From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from mailman by lists.gnu.org with tmda-scanned (Exim 4.43) id 1M0uU4-0001KA-GB for qemu-devel@nongnu.org; Mon, 04 May 2009 05:29:12 -0400 Received: from exim by lists.gnu.org with spam-scanned (Exim 4.43) id 1M0uTz-0001Hh-Dc for qemu-devel@nongnu.org; Mon, 04 May 2009 05:29:11 -0400 Received: from [199.232.76.173] (port=58068 helo=monty-python.gnu.org) by lists.gnu.org with esmtp (Exim 4.43) id 1M0uTz-0001HX-7J for qemu-devel@nongnu.org; Mon, 04 May 2009 05:29:07 -0400 Received: from lizzard.sbs.de ([194.138.37.39]:18179) by monty-python.gnu.org with esmtps (TLS-1.0:DHE_RSA_AES_256_CBC_SHA1:32) (Exim 4.60) (envelope-from ) id 1M0uTy-0006S2-Lb for qemu-devel@nongnu.org; Mon, 04 May 2009 05:29:07 -0400 Message-ID: <49FEB55F.4060603@siemens.com> Date: Mon, 04 May 2009 11:29:03 +0200 From: Jan Kiszka MIME-Version: 1.0 References: <20090501211717.24514.23246.stgit@mchn012c.ww002.siemens.net> <20090501211721.24514.10182.stgit@mchn012c.ww002.siemens.net> <49FDBF20.1020207@redhat.com> <49FEAD2E.6080706@siemens.com> <49FEB186.8030605@redhat.com> In-Reply-To: <49FEB186.8030605@redhat.com> Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 7bit Subject: [Qemu-devel] Re: [PATCH 8/8] kvm: Rework VCPU reset List-Id: qemu-devel.nongnu.org List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , To: Avi Kivity Cc: Anthony Liguori , qemu-devel@nongnu.org Avi Kivity wrote: > Jan Kiszka wrote: >> Avi Kivity wrote: >> >>> Jan Kiszka wrote: >>> >>>> Use standard callback with highest order to synchronize VCPU on reset >>>> after all device callbacks were execute. This allows to remove the >>>> special kvm hook in qemu_system_reset. >>>> >>> Is this needed for the lapic reset callback? >>> >>> If so, we can express the dependency explicitly rather than with a >>> priority, by having cpu reset notifiers invoked when the cpu is >>> reset. In the case of the lapic, I don't think we need an abstract >>> mechanism; >>> the lapic is part of the cpu, not some random device. >>> >>> Maybe we should even save/load it as part of the cpu. >>> >>> >> >> QEMU is not only providing the LAPIC, but also covering the old >> dedicated version. That makes at least HW instantiating a bit more >> complex. >> >> > > What do you mean by 'old dedicated version'? Separate chip, not part of the CPU. Some 486 system used to have this IIRC. Jan -- Siemens AG, Corporate Technology, CT SE 2 Corporate Competence Center Embedded Linux