From: Richard Henderson <richard.henderson@linaro.org>
To: Stevie Lavern <stevie.lavern@gmail.com>, qemu-devel@nongnu.org
Subject: Re: Rational behind partial AVX support in Qemu
Date: Wed, 5 Jan 2022 18:45:13 -0800 [thread overview]
Message-ID: <49a5b6c6-8618-a9fc-2cec-ef60b8b59d62@linaro.org> (raw)
In-Reply-To: <CADV2EAtTPjHP=H7AMAdva7UjydjM5DwK=NDAm3HYM-MHeD9wyg@mail.gmail.com>
On 1/5/22 9:09 AM, Stevie Lavern wrote:
> Hello,
> I'm currently testing various binaries under qemu linux user and went into a strange bug.
>
> Here is the TLDR: is there a reason to allow VEX.L to be 1 when not supporting AVX
> instructions?
There are some integer instructions that use vex encoding, e.g. andn, and we support some
of those, thus any support for VEX at all. But you're probably correct that we could
usefully filter VEX.L = 1 early.
r~
next prev parent reply other threads:[~2022-01-06 2:46 UTC|newest]
Thread overview: 5+ messages / expand[flat|nested] mbox.gz Atom feed top
2022-01-05 17:09 Rational behind partial AVX support in Qemu Stevie Lavern
2022-01-06 2:45 ` Richard Henderson [this message]
2022-01-06 9:14 ` Stevie Lavern
2022-01-06 16:29 ` Richard Henderson
2022-01-07 8:56 ` Stevie Lavern
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