From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from mailman by lists.gnu.org with tmda-scanned (Exim 4.43) id 1M1kWS-0001jY-Gt for qemu-devel@nongnu.org; Wed, 06 May 2009 13:03:08 -0400 Received: from exim by lists.gnu.org with spam-scanned (Exim 4.43) id 1M1kWO-0001jK-S4 for qemu-devel@nongnu.org; Wed, 06 May 2009 13:03:08 -0400 Received: from [199.232.76.173] (port=54741 helo=monty-python.gnu.org) by lists.gnu.org with esmtp (Exim 4.43) id 1M1kWO-0001jH-Lh for qemu-devel@nongnu.org; Wed, 06 May 2009 13:03:04 -0400 Received: from gecko.sbs.de ([194.138.37.40]:18188) by monty-python.gnu.org with esmtps (TLS-1.0:DHE_RSA_AES_256_CBC_SHA1:32) (Exim 4.60) (envelope-from ) id 1M1kWN-0004TT-UB for qemu-devel@nongnu.org; Wed, 06 May 2009 13:03:04 -0400 Message-ID: <4A01C2C0.2000609@siemens.com> Date: Wed, 06 May 2009 19:02:56 +0200 From: Jan Kiszka MIME-Version: 1.0 References: <1241621382-21577-1-git-send-email-glommer@redhat.com> <1241621382-21577-2-git-send-email-glommer@redhat.com> In-Reply-To: <1241621382-21577-2-git-send-email-glommer@redhat.com> Content-Type: text/plain; charset=ISO-8859-15 Content-Transfer-Encoding: 7bit Subject: [Qemu-devel] Re: [PATCH 1/4] move registering of cpu_reset to inside cpu_init List-Id: qemu-devel.nongnu.org List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , To: Glauber Costa Cc: aliguori@us.ibm.com, qemu-devel@nongnu.org Glauber Costa wrote: > This is not pc specific by any means. So we can be > moved to inside cpu_x86_init(). > > This is part of an attempt to only initialize kvm state > after everything is already properly initialized. If we don't > do that, we can race against, for example, APIC state if kvm vcpus > are ran in threads (happens in qemu-kvm.git, soon to happen here too) > > Signed-off-by: Glauber Costa > --- > hw/pc.c | 7 ------- > target-i386/helper.c | 8 ++++++++ > 2 files changed, 8 insertions(+), 7 deletions(-) > > diff --git a/hw/pc.c b/hw/pc.c > index 61f6e7b..351de83 100644 > --- a/hw/pc.c > +++ b/hw/pc.c > @@ -725,12 +725,6 @@ static void load_linux(target_phys_addr_t option_rom, > generate_bootsect(option_rom, gpr, seg, 0); > } > > -static void main_cpu_reset(void *opaque) > -{ > - CPUState *env = opaque; > - cpu_reset(env); > -} > - > static const int ide_iobase[2] = { 0x1f0, 0x170 }; > static const int ide_iobase2[2] = { 0x3f6, 0x376 }; > static const int ide_irq[2] = { 14, 15 }; > @@ -861,7 +855,6 @@ static void pc_init1(ram_addr_t ram_size, int vga_ram_size, > /* XXX: enable it in all cases */ > env->cpuid_features |= CPUID_APIC; > } > - qemu_register_reset(main_cpu_reset, env); > if (pci_enabled) { > apic_init(env); > } > diff --git a/target-i386/helper.c b/target-i386/helper.c > index a070e08..2210412 100644 > --- a/target-i386/helper.c > +++ b/target-i386/helper.c > @@ -29,6 +29,7 @@ > #include "exec-all.h" > #include "qemu-common.h" > #include "kvm.h" > +#include "hw/hw.h" > > //#define DEBUG_MMU > > @@ -507,6 +508,11 @@ void cpu_reset(CPUX86State *env) > cpu_watchpoint_remove_all(env, BP_CPU); > } > > +static void main_cpu_reset(void *_env) > +{ > + cpu_reset((CPUState *)_env); > +} > + > void cpu_x86_close(CPUX86State *env) > { > qemu_free(env); > @@ -1689,6 +1695,8 @@ CPUX86State *cpu_x86_init(const char *cpu_model) > return NULL; > } > cpu_reset(env); > + qemu_register_reset(main_cpu_reset, env); > + > #ifdef CONFIG_KQEMU > kqemu_init(env); > #endif After digging through the dependencies of apic and cpu again, this looks safe (it reorders reset execution, but that should have no side effect). Jan -- Siemens AG, Corporate Technology, CT SE 2 Corporate Competence Center Embedded Linux