From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from mailman by lists.gnu.org with tmda-scanned (Exim 4.43) id 1M6SdX-0002Kv-BX for qemu-devel@nongnu.org; Tue, 19 May 2009 12:57:55 -0400 Received: from exim by lists.gnu.org with spam-scanned (Exim 4.43) id 1M6SdS-0002D7-CU for qemu-devel@nongnu.org; Tue, 19 May 2009 12:57:54 -0400 Received: from [199.232.76.173] (port=59125 helo=monty-python.gnu.org) by lists.gnu.org with esmtp (Exim 4.43) id 1M6SdS-0002Ch-6S for qemu-devel@nongnu.org; Tue, 19 May 2009 12:57:50 -0400 Received: from mx2.redhat.com ([66.187.237.31]:38318) by monty-python.gnu.org with esmtp (Exim 4.60) (envelope-from ) id 1M6SdR-0003s8-KB for qemu-devel@nongnu.org; Tue, 19 May 2009 12:57:49 -0400 Message-ID: <4A12E508.6000002@redhat.com> Date: Tue, 19 May 2009 19:57:44 +0300 From: Avi Kivity MIME-Version: 1.0 Subject: Re: [Qemu-devel] [PATCH 1/4] Confine use of global rtc_state to PC CMOS functions References: <87zldtotvx.fsf@pike.pond.sub.org> <87pre5twbh.fsf@pike.pond.sub.org> In-Reply-To: <87pre5twbh.fsf@pike.pond.sub.org> Content-Type: text/plain; charset=ISO-8859-1; format=flowed Content-Transfer-Encoding: 7bit List-Id: qemu-devel.nongnu.org List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , To: Markus Armbruster Cc: Blue Swirl , qemu-devel@nongnu.org Markus Armbruster wrote: > How does the hardware do it? Does it update CMOS all by itself? > I'm guessing the hardware only makes this present in a chipset register. The BIOS reads the registers and writes the CMOS memory (which is likely on the same chip, but...). Would be best to adopt that. -- error compiling committee.c: too many arguments to function