From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from mailman by lists.gnu.org with tmda-scanned (Exim 4.43) id 1MFbX0-0002Gq-Oz for qemu-devel@nongnu.org; Sat, 13 Jun 2009 18:16:58 -0400 Received: from exim by lists.gnu.org with spam-scanned (Exim 4.43) id 1MFbWw-0002Ep-3Z for qemu-devel@nongnu.org; Sat, 13 Jun 2009 18:16:58 -0400 Received: from [199.232.76.173] (port=53057 helo=monty-python.gnu.org) by lists.gnu.org with esmtp (Exim 4.43) id 1MFbWv-0002Ec-Sh for qemu-devel@nongnu.org; Sat, 13 Jun 2009 18:16:53 -0400 Received: from e5.ny.us.ibm.com ([32.97.182.145]:38968) by monty-python.gnu.org with esmtps (TLS-1.0:DHE_RSA_AES_256_CBC_SHA1:32) (Exim 4.60) (envelope-from ) id 1MFbWv-00056t-GE for qemu-devel@nongnu.org; Sat, 13 Jun 2009 18:16:53 -0400 Received: from d01relay02.pok.ibm.com (d01relay02.pok.ibm.com [9.56.227.234]) by e5.ny.us.ibm.com (8.13.1/8.13.1) with ESMTP id n5DM9H73007050 for ; Sat, 13 Jun 2009 18:09:17 -0400 Received: from d01av01.pok.ibm.com (d01av01.pok.ibm.com [9.56.224.215]) by d01relay02.pok.ibm.com (8.13.8/8.13.8/NCO v9.2) with ESMTP id n5DMFKEt181432 for ; Sat, 13 Jun 2009 18:15:20 -0400 Received: from d01av01.pok.ibm.com (loopback [127.0.0.1]) by d01av01.pok.ibm.com (8.12.11.20060308/8.13.3) with ESMTP id n5DMFJLg017919 for ; Sat, 13 Jun 2009 18:15:20 -0400 Message-ID: <4A3424F4.4030604@us.ibm.com> Date: Sat, 13 Jun 2009 17:15:16 -0500 From: Anthony Liguori MIME-Version: 1.0 Subject: Re: [Qemu-devel] [PATCH] Incorrect MBAR offset for an5206 UART2 output port bit set References: In-Reply-To: Content-Type: text/plain; charset=ISO-8859-1; format=flowed Content-Transfer-Encoding: 7bit List-Id: qemu-devel.nongnu.org List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , To: Evan Goldenberg Cc: qemu-devel@nongnu.org Evan Goldenberg wrote: > The MBAR offset for the UART2 output port bit set function on the > an5206 board, though unimplemented, is incorrectly defined as 0x1c8. > The correct offset used by the hardware for this function is 0x1b8. > This typo causes QEMU to crash whenever attempts to access use UART2 > are made: > > qemu: fatal: Bad MBAR write offset 0x1b8 > > The following patch resolves this issue. > > diff --git a/hw/mcf5206.c b/hw/mcf5206.c > index b570376..8bf11a4 100644 > --- a/hw/mcf5206.c > +++ b/hw/mcf5206.c > @@ -341,7 +341,7 @@ static void m5206_mbar_write(m5206_mbar_state *s, > uint32_t offset, > This is whitespace damaged. > case 0x170: > s->uivr[0] = value; > break; > - case 0x178: case 0x17c: case 0x1c8: case 0x1bc: > + case 0x178: case 0x17c: case 0x1b8: case 0x1bc: > /* Not implemented: UART Output port bits. */ > break; > case 0x1b0: > > > > -- Regards, Anthony Liguori