From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from mailman by lists.gnu.org with tmda-scanned (Exim 4.43) id 1MJQFS-0007iU-I5 for qemu-devel@nongnu.org; Wed, 24 Jun 2009 07:02:38 -0400 Received: from exim by lists.gnu.org with spam-scanned (Exim 4.43) id 1MJQFN-0007gO-DY for qemu-devel@nongnu.org; Wed, 24 Jun 2009 07:02:37 -0400 Received: from [199.232.76.173] (port=40650 helo=monty-python.gnu.org) by lists.gnu.org with esmtp (Exim 4.43) id 1MJQFM-0007g7-Vi for qemu-devel@nongnu.org; Wed, 24 Jun 2009 07:02:33 -0400 Received: from wa4ehsobe005.messaging.microsoft.com ([216.32.181.15]:12582 helo=WA4EHSOBE005.bigfish.com) by monty-python.gnu.org with esmtps (TLS-1.0:RSA_ARCFOUR_MD5:16) (Exim 4.60) (envelope-from ) id 1MJQFM-0000rx-BE for qemu-devel@nongnu.org; Wed, 24 Jun 2009 07:02:32 -0400 Message-ID: <4A420836.10302@amd.com> Date: Wed, 24 Jun 2009 13:04:22 +0200 From: Andre Przywara MIME-Version: 1.0 References: <1245707277-769-1-git-send-email-andre.przywara@amd.com> <4A41F7EC.2000305@redhat.com> In-Reply-To: <4A41F7EC.2000305@redhat.com> Content-Type: text/plain; charset="ISO-8859-1"; format=flowed Content-Transfer-Encoding: 7bit Subject: [Qemu-devel] Re: [PATCH 2/2] introduce -cpu host target List-Id: qemu-devel.nongnu.org List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , To: Avi Kivity Cc: aliguori@us.ibm.com, qemu-devel@nongnu.org, kvm@vger.kernel.org Avi Kivity wrote: > On 06/23/2009 12:47 AM, Andre Przywara wrote: >> Should we ignore unhandled MSRs like QEMU or Xen do? >> > > Ignoring unhandled msrs is dangerous. If a write has some effect the > guest depends on, and we're not emulating that effect, the guest will > fail. Similarly if you don't know what a register mean, who knows what > returning zero for a read will do. I agree - from an academic POV. But if the pragmatic approach simply enables many guests to run, then it's at least worth considering it. And with the current approach the guest fails, too (due to the injected #GP). If I only look at AMD's list of MSRs (not to speak of the internal list ;-), there will be a lot of work to emulate them. Even worse, most of them cannot be properly emulated (like disable Lock prefix). But nevertheless I would like to continue the "patch-on-demand" path by catching those MSRs that in-the-wild OSes really touch and handle them appropriately. Hopefully that will cover most of the MSRs. Maybe we could consider an (module? QEMU cmdline?) option to ignore unknown MSRs. Regards, Andre. -- Andre Przywara AMD-Operating System Research Center (OSRC), Dresden, Germany Tel: +49 351 448 3567 12 ----to satisfy European Law for business letters: Advanced Micro Devices GmbH Karl-Hammerschmidt-Str. 34, 85609 Dornach b. Muenchen Geschaeftsfuehrer: Thomas M. McCoy; Giuliano Meroni Sitz: Dornach, Gemeinde Aschheim, Landkreis Muenchen Registergericht Muenchen, HRB Nr. 43632