From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from mailman by lists.gnu.org with tmda-scanned (Exim 4.43) id 1MViWn-0005jq-F3 for qemu-devel@nongnu.org; Tue, 28 Jul 2009 04:59:21 -0400 Received: from exim by lists.gnu.org with spam-scanned (Exim 4.43) id 1MViWl-0005jI-UQ for qemu-devel@nongnu.org; Tue, 28 Jul 2009 04:59:21 -0400 Received: from [199.232.76.173] (port=51483 helo=monty-python.gnu.org) by lists.gnu.org with esmtp (Exim 4.43) id 1MViWl-0005jE-H4 for qemu-devel@nongnu.org; Tue, 28 Jul 2009 04:59:19 -0400 Received: from relay1.sgi.com ([192.48.179.29]:41845 helo=relay.sgi.com) by monty-python.gnu.org with esmtp (Exim 4.60) (envelope-from ) id 1MViWk-0007vB-Br for qemu-devel@nongnu.org; Tue, 28 Jul 2009 04:59:19 -0400 Message-ID: <4A6EBDDE.2080409@sgi.com> Date: Tue, 28 Jul 2009 10:59:10 +0200 From: Jes Sorensen MIME-Version: 1.0 References: <4A69B200.3030500@sgi.com> <20090725015649.GA15207@morn.localdomain> <4A6D562C.3010103@sgi.com> <4A6DF629.1030802@us.ibm.com> In-Reply-To: <4A6DF629.1030802@us.ibm.com> Content-Type: multipart/mixed; boundary="------------020600050409020102070804" Subject: [Qemu-devel] Re: [PATCH] Seabios irq override support. List-Id: qemu-devel.nongnu.org List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , To: Beth Kon Cc: Kevin O'Connor , qemu-devel This is a multi-part message in MIME format. --------------020600050409020102070804 Content-Type: text/plain; charset=ISO-8859-1; format=flowed Content-Transfer-Encoding: 7bit On 07/27/2009 08:47 PM, Beth Kon wrote: > Hi Jes. These bios changes rely on matching userspace/kernel changes > that translate irq0->inti2. So assuming seabios is used for systems > other than kvm and qemu, this code would need to be conditionally removed. Hi Beth, Thanks for the input. I guess we'll want it to be CONFIG_KVM for now then, since Seabios doesn't know of BX_QEMU. Once we have more of the cfg_fw stuff needed for this, the #ifdef part can be made prettier. > But I'm not clear on what you're doing with this patch. You didn't > include the irq0override flag that is needed by kvm because there are > circumstances under which kvm turns off irq0override (i.e., old kernels > that don't support irq routing). So this patch is fine for qemu, since > it is permanently enabled there, but it is not a permanent solution for > kvm. The reason I didn't include the irq0override flag is that the fw_cfg bits for this aren't in Seabios yet. I'll be happy to add them in a follow up patch. How do you like this version? It's a little more complex as I introduced the irq0override variable, but it will make it very easy to add the cfg_fw stuff. Cheers, Jes --------------020600050409020102070804 Content-Type: text/x-patch; name="0004-irq-override-v2.patch" Content-Transfer-Encoding: 7bit Content-Disposition: attachment; filename="0004-irq-override-v2.patch" Implement irq override support for timer interrupts. This matches what QEMU+BOCHS has been doing for the latest 8 months, and is also what real hardware does. Windows expects this according to Beth Kon. Signed-off-by: Jes Sorensen --- src/acpi.c | 12 ++++++++++++ src/mptable.c | 26 +++++++++++++++++++++++--- src/util.h | 3 +++ 3 files changed, 38 insertions(+), 3 deletions(-) Index: seabios/src/acpi.c =================================================================== --- seabios.orig/src/acpi.c +++ seabios/src/acpi.c @@ -433,6 +433,18 @@ void acpi_bios_init(void) io_apic->interrupt = cpu_to_le32(0); struct madt_intsrcovr *intsrcovr = (void*)&io_apic[1]; + + if (irq0override) { + memset(intsrcovr, 0, sizeof(*intsrcovr)); + intsrcovr->type = APIC_XRUPT_OVERRIDE; + intsrcovr->length = sizeof(*intsrcovr); + intsrcovr->source = 0; + intsrcovr->gsi = 2; + intsrcovr->flags = 0; /* conforms to bus specifications */ + intsrcovr++; + madt_size += sizeof(struct madt_intsrcovr); + } + for (i = 0; i < 16; i++) { if (!(PCI_ISA_IRQ_MASK & (1 << i))) /* No need for a INT source override structure. */ Index: seabios/src/mptable.c =================================================================== --- seabios.orig/src/mptable.c +++ seabios/src/mptable.c @@ -10,6 +10,12 @@ #include "config.h" // CONFIG_* #include "mptable.h" // MPTABLE_SIGNATURE +#if CONFIG_KVM +int irq0override = 1; +#else +int irq0override = 0; +#endif + void mptable_init(void) { @@ -29,7 +35,10 @@ mptable_init(void) + sizeof(struct mpt_cpu) * smp_cpus + sizeof(struct mpt_bus) + sizeof(struct mpt_ioapic) - + sizeof(struct mpt_intsrc) * 16); + + sizeof(struct mpt_intsrc) * 15); + if (!irq0override) + length += sizeof(struct mpt_intsrc); + if (start + length > bios_table_end_addr) { dprintf(1, "No room for MPTABLE!\n"); return; @@ -96,13 +105,24 @@ mptable_init(void) /* irqs */ struct mpt_intsrc *intsrcs = (void *)&ioapic[1]; + int j = 0; for(i = 0; i < 16; i++) { - struct mpt_intsrc *isrc = &intsrcs[i]; + struct mpt_intsrc *isrc; + /* One entry per ioapic interrupt destination. Destination 2 is covered + by irq0->inti2 override (i == 0). Source IRQ 2 is unused */ + if (irq0override && i == 2) { + j = 1; + continue; + } + isrc = &intsrcs[i - j]; memset(isrc, 0, sizeof(*isrc)); isrc->type = MPT_TYPE_INTSRC; isrc->srcbusirq = i; isrc->dstapic = ioapic_id; - isrc->dstirq = i; + if (irq0override && i == 0) + isrc->dstirq = 2; + else + isrc->dstirq = i; } // Set checksum. Index: seabios/src/util.h =================================================================== --- seabios.orig/src/util.h +++ seabios/src/util.h @@ -238,4 +238,7 @@ void reset_vector() __attribute__ ((nore // misc.c extern u8 BiosChecksum; +// mptable.c +extern int irq0override; + #endif // util.h --------------020600050409020102070804--