From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from mailman by lists.gnu.org with tmda-scanned (Exim 4.43) id 1Mm46X-0001Ew-Ux for qemu-devel@nongnu.org; Fri, 11 Sep 2009 07:15:50 -0400 Received: from exim by lists.gnu.org with spam-scanned (Exim 4.43) id 1Mm46R-0001EJ-OM for qemu-devel@nongnu.org; Fri, 11 Sep 2009 07:15:47 -0400 Received: from [199.232.76.173] (port=58735 helo=monty-python.gnu.org) by lists.gnu.org with esmtp (Exim 4.43) id 1Mm46Q-0001E9-4R for qemu-devel@nongnu.org; Fri, 11 Sep 2009 07:15:42 -0400 Received: from goliath.siemens.de ([192.35.17.28]:19924) by monty-python.gnu.org with esmtps (TLS-1.0:DHE_RSA_AES_256_CBC_SHA1:32) (Exim 4.60) (envelope-from ) id 1Mm46P-0005iD-Ll for qemu-devel@nongnu.org; Fri, 11 Sep 2009 07:15:42 -0400 Message-ID: <4AAA3165.4030009@siemens.com> Date: Fri, 11 Sep 2009 13:15:49 +0200 From: Jan Kiszka MIME-Version: 1.0 References: <200909092236.n89MaDVc020267@d01av01.pok.ibm.com> In-Reply-To: <200909092236.n89MaDVc020267@d01av01.pok.ibm.com> Content-Type: text/plain; charset=ISO-8859-15 Content-Transfer-Encoding: 7bit Subject: [Qemu-devel] Re: [COMMIT 733318e] don't call cpu_sychronize_state from reset handlers List-Id: qemu-devel.nongnu.org List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , To: Glauber Costa Cc: Anthony Liguori , qemu-devel , Avi Kivity Anthony Liguori wrote: > From: Glauber Costa > > Doing this will make the vcpu ioctl be issued from the I/O thread, instead > of cpu thread. The correct behaviour is to call it from within the cpu thread, > as soon as we are ready to go. Note that in the good old days, this used to work properly (in qemu-kvm) as registers write-back was routed through on_vcpu. > > Signed-off-by: Glauber Costa > Signed-off-by: Anthony Liguori > > diff --git a/hw/apic.c b/hw/apic.c > index 2c414c1..9f1d25e 100644 > --- a/hw/apic.c > +++ b/hw/apic.c > @@ -938,8 +938,6 @@ static void apic_reset(void *opaque) > APICState *s = opaque; > int bsp; > > - cpu_synchronize_state(s->cpu_env); > - > bsp = cpu_is_bsp(s->cpu_env); > s->apicbase = 0xfee00000 | > (bsp ? MSR_IA32_APICBASE_BSP : 0) | MSR_IA32_APICBASE_ENABLE; > diff --git a/vl.c b/vl.c > index 8e5d9db..c6c6a6b 100644 > --- a/vl.c > +++ b/vl.c > @@ -3683,10 +3683,12 @@ static void *kvm_cpu_thread_fn(void *arg) > while (!qemu_system_ready) > qemu_cond_timedwait(&qemu_system_cond, &qemu_global_mutex, 100); > > + cpu_synchronize_state(env); > + > while (1) { > + qemu_wait_io_event(env); > if (cpu_can_run(env)) > qemu_cpu_exec(env); > - qemu_wait_io_event(env); > } > > return NULL; > @@ -3711,6 +3713,9 @@ static void *tcg_cpu_thread_fn(void *arg) > while (!qemu_system_ready) > qemu_cond_timedwait(&qemu_system_cond, &qemu_global_mutex, 100); > > + for (env = first_cpu; env != NULL; env = env->next_cpu) { > + cpu_synchronize_state(env); > + } > while (1) { > tcg_cpu_exec(); > qemu_wait_io_event(cur_cpu); > This unfortunately breaks upstream KVM (Linux fails to detect the tiemr IRQ properly). Is there a fix already in sight? I lost a bit overview of all on_vcpu refactorings and kvm-register sync "simplifications". Jan -- Siemens AG, Corporate Technology, CT SE 2 Corporate Competence Center Embedded Linux