From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from mailman by lists.gnu.org with tmda-scanned (Exim 4.43) id 1MtHOp-0003vi-Dl for qemu-devel@nongnu.org; Thu, 01 Oct 2009 04:52:31 -0400 Received: from exim by lists.gnu.org with spam-scanned (Exim 4.43) id 1MtHOk-0003se-VC for qemu-devel@nongnu.org; Thu, 01 Oct 2009 04:52:31 -0400 Received: from [199.232.76.173] (port=51501 helo=monty-python.gnu.org) by lists.gnu.org with esmtp (Exim 4.43) id 1MtHOk-0003sR-Mn for qemu-devel@nongnu.org; Thu, 01 Oct 2009 04:52:26 -0400 Received: from mx1.redhat.com ([209.132.183.28]:52069) by monty-python.gnu.org with esmtp (Exim 4.60) (envelope-from ) id 1MtHOk-00060H-6N for qemu-devel@nongnu.org; Thu, 01 Oct 2009 04:52:26 -0400 Message-ID: <4AC46DC3.4000202@redhat.com> Date: Thu, 01 Oct 2009 10:52:19 +0200 From: Avi Kivity MIME-Version: 1.0 Subject: Re: [Qemu-devel] [PATCH 59/61] ioapic: make irr accept more than 32 pins. References: <1254305917-14784-1-git-send-email-yamahata@valinux.co.jp> <1254305917-14784-60-git-send-email-yamahata@valinux.co.jp> In-Reply-To: <1254305917-14784-60-git-send-email-yamahata@valinux.co.jp> Content-Type: text/plain; charset=UTF-8; format=flowed Content-Transfer-Encoding: 7bit List-Id: qemu-devel.nongnu.org List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , To: Isaku Yamahata Cc: qemu-devel@nongnu.org On 09/30/2009 12:18 PM, Isaku Yamahata wrote: > make irr accept more than 32 pins. > Is this needed? I see you later define +#define ICH9_LPC_IOAPIC_NUM_PINS 24 -- Do not meddle in the internals of kernels, for they are subtle and quick to panic.