Re: [Qemu-devel] cpuid problem in upstream qemu with kvm

[Andre Przywara <andre.przywara@amd.com>]

Avi Kivity wrote:
> On 12/20/2009 07:59 PM, Anthony Liguori wrote:
>> Gleb Natapov wrote:
>>> Windows is a mystery box, so we can speculate as much as we want 
>>> about it.
>>> If you don't like something just say "it may break Windows" :) Losing
>>> activation does sound like an issue too.
>>
>> Downgrading seems more likely to cause problems.  Considering running 
>> mplayer in a guest.  If it detects SSE3 in one host and migrate to 
>> another host that doesn't have SSE3, you'll be running an instruction 
>> stream that uses instructions the processor doesn't support resulting 
>> in the application faulting due to an illegal operation.
>>
> 
> Migration needs preparation beforehand.  You can't take two random hosts 
> with two random qemu flag sets and expect it to work.
> 
>> KVM's cpuid filter doesn't help here because it won't attempt to mask 
>> things like sse3.  It would be insane to emulate sse3 too.
> 
> It does expose sse3 support (called pni in Linux IIRC).  Not sure if 
> qemu masks it, but the information is there.
What about using -cpu kvm64?
This has SSE3 as well as CMPXCHG16, both are available in all VMX/SVM 
capable machines (as far as I could find out) and in TCG.
This gives a pretty descent base without loosing many relevant 
performance features.

>... 
>> This is a classic management tool problem and the solution usually is 
>> a set of heuristics depending on how conservative the target audience is.
> 
> Right.  My concern is with casual users upgrading their machine, not 
> enterprise users who should be protected by their tools.
Then what about fixing the CPUID bits to those returned by the KVM 
module the first time the guest is started? Later you would only use 
those bits (which may have been cropped) for later restarts of the same 
guest. If you only upgrade your machine, then there should be no problems.

Regards,
Andre.

P.S. What feature bits do we talk about?
Maybe we should group them and use aliases for those.
SS_S_E3 and SSE4.x come to mind, are any other bits really relevant? (Or 
do they justify the pain we have when propagating them?)
Then we would only need: Athlon64, Core2, Nehalem (and maybe Phenom).

-- 
Andre Przywara
AMD-Operating System Research Center (OSRC), Dresden, Germany
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