From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from mailman by lists.gnu.org with tmda-scanned (Exim 4.43) id 1NMkkE-00027Q-VS for qemu-devel@nongnu.org; Mon, 21 Dec 2009 11:04:26 -0500 Received: from exim by lists.gnu.org with spam-scanned (Exim 4.43) id 1NMkkA-00026A-IX for qemu-devel@nongnu.org; Mon, 21 Dec 2009 11:04:26 -0500 Received: from [199.232.76.173] (port=46242 helo=monty-python.gnu.org) by lists.gnu.org with esmtp (Exim 4.43) id 1NMkkA-000267-AY for qemu-devel@nongnu.org; Mon, 21 Dec 2009 11:04:22 -0500 Received: from cantor.suse.de ([195.135.220.2]:57465 helo=mx1.suse.de) by monty-python.gnu.org with esmtps (TLS-1.0:DHE_RSA_AES_256_CBC_SHA1:32) (Exim 4.60) (envelope-from ) id 1NMkk9-00083X-IM for qemu-devel@nongnu.org; Mon, 21 Dec 2009 11:04:22 -0500 Message-ID: <4B2F9C83.8060004@suse.de> Date: Mon, 21 Dec 2009 17:04:19 +0100 From: Alexander Graf MIME-Version: 1.0 Subject: Re: [Qemu-devel] [PATCH] PPC64: Fix timebase References: <1261354932-28003-1-git-send-email-agraf@suse.de> <20091221092455.GA4990@volta.aurel32.net> <09A49DC5-406F-4211-A9E4-F5C78FF6F44D@suse.de> <20091221150558.GC4990@volta.aurel32.net> In-Reply-To: <20091221150558.GC4990@volta.aurel32.net> Content-Type: text/plain; charset=ISO-8859-15 Content-Transfer-Encoding: 7bit List-Id: qemu-devel.nongnu.org List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , To: Aurelien Jarno Cc: qemu-devel@nongnu.org Aurelien Jarno wrote: > On Mon, Dec 21, 2009 at 12:15:42PM +0100, Alexander Graf wrote: > >> On 21.12.2009, at 10:24, Aurelien Jarno wrote: >> >> >>> On Mon, Dec 21, 2009 at 01:22:12AM +0100, Alexander Graf wrote: >>> >>>> On PPC we have a 64-bit time base. Usually (PPC32) this is accessed using >>>> two separate 32 bit SPR accesses to SPR_TBU and SPR_TBL. >>>> >>>> On PPC64 the SPR_TBL register acts as 64 bit though, so we get the full >>>> 64 bits as return value. If we only take the lower ones, fine. But Linux >>>> wants to see all 64 bits or it breaks. >>>> >>> Good catch! However, I think this patch it's not fully complete and can >>> be improved a bit >>> - it's probably better to return a target_ulong value from >>> cpu_ppc_load_tbl() with an explicit cast here, so that we don't have >>> an implicit cast from 64-bit to 32-bit on qemu-system-powerpc (GCC may >>> warn on that with some flags or in future versions). >>> - the store function also has to be fixed. >>> - the same changes should be done for the alternate timebase. >>> > > They are defined in the Book II, and corresponds to atbl and atbu > functions. > > >> Uuuh: >> >> __attribute__ (( unused )) >> static void spr_read_atbl (void *opaque, int gprn, int sprn) >> { >> gen_helper_load_atbl(cpu_gpr[gprn]); >> } >> >> And that attribute is correct. There is no caller. >> >> > > Ok. I have committed a fix anyway, so that if someone enable it later, > he/she doesn't spend to much time fixing the bug. > Thanks :-). Alex