qemu-devel.nongnu.org archive mirror
 help / color / mirror / Atom feed
From: Richard Henderson <rth@twiddle.net>
To: Aurelien Jarno <aurelien@aurel32.net>
Cc: laurent.desnogues@gmail.com, qemu-devel@nongnu.org
Subject: Re: [Qemu-devel] [PATCH 1/2] tcg-x86_64: Special-case all 32-bit AND operands.
Date: Thu, 14 Jan 2010 08:05:58 -0800	[thread overview]
Message-ID: <4B4F40E6.9040509@twiddle.net> (raw)
In-Reply-To: <20100114155727.GE16630@volta.aurel32.net>

On 01/14/2010 07:57 AM, Aurelien Jarno wrote:
> On Tue, Jan 05, 2010 at 04:03:00PM -0800, Richard Henderson wrote:
>> This avoids an unnecessary REX.W prefix when dealing with AND
>> operands that fit into a 32-bit quantity.  The most common change
>> actually seen is movz[wb]q ->  movz[wb]l.
>>
>> Similarly, avoid REXW in ext{8,16}u_i64 tcg opcodes.
>>
>> Signed-off-by: Richard Henderson<rth@twiddle.net>
>> ---
>>   tcg/x86_64/tcg-target.c |   26 ++++++++------------------
>>   1 files changed, 8 insertions(+), 18 deletions(-)
>>
>> diff --git a/tcg/x86_64/tcg-target.c b/tcg/x86_64/tcg-target.c
>> index 2339091..f584c94 100644
>> --- a/tcg/x86_64/tcg-target.c
>> +++ b/tcg/x86_64/tcg-target.c
>> @@ -426,24 +426,18 @@ static inline void tgen_arithi64(TCGContext *s, int c, int r0, int64_t val)
>>       } else if ((c == ARITH_ADD&&  val == -1) || (c == ARITH_SUB&&  val == 1)) {
>>           /* dec */
>>           tcg_out_modrm(s, 0xff | P_REXW, 1, r0);
>> -    } else if (val == (int8_t)val) {
>> -        tcg_out_modrm(s, 0x83 | P_REXW, c, r0);
>> -        tcg_out8(s, val);
>> -    } else if (c == ARITH_AND&&  val == 0xffu) {
>> -        /* movzbl */
>> -        tcg_out_modrm(s, 0xb6 | P_EXT | P_REXW, r0, r0);
>> -    } else if (c == ARITH_AND&&  val == 0xffffu) {
>> -        /* movzwl */
>> -        tcg_out_modrm(s, 0xb7 | P_EXT | P_REXW, r0, r0);
>>       } else if (c == ARITH_AND&&  val == 0xffffffffu) {
>>           /* 32-bit mov zero extends */
>>           tcg_out_modrm(s, 0x8b, r0, r0);
>> +    } else if (c == ARITH_AND&&  (uint64_t)val<= 0xffffffffu) {
>> +        /* AND with no high bits set can use a 32-bit operation.  */
>> +        tgen_arithi32(s, c, r0, val);
>
> Do we really want to call tgen_arithi32() here, that will redo part of
> the above tests again? It might be better to simply remove the REX.W
> prefix above instead.

Pardon?  Do you mean the inc/dec tests?  Otherwise I don't see what 
"above tests again" you're talking about.

I am looking to handle more than 0xff, 0xffff with the new test in 
gen_arithi64 -- 0x1234 is an appropriate mask to shorten to 32-bit AND 
as well.  I have no idea if that answers your question.


r~

  reply	other threads:[~2010-01-14 16:06 UTC|newest]

Thread overview: 4+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2010-01-06  0:03 [Qemu-devel] [PATCH 1/2] tcg-x86_64: Special-case all 32-bit AND operands Richard Henderson
2010-01-14 15:57 ` Aurelien Jarno
2010-01-14 16:05   ` Richard Henderson [this message]
2010-01-14 18:58     ` Aurelien Jarno

Reply instructions:

You may reply publicly to this message via plain-text email
using any one of the following methods:

* Save the following mbox file, import it into your mail client,
  and reply-to-all from there: mbox

  Avoid top-posting and favor interleaved quoting:
  https://en.wikipedia.org/wiki/Posting_style#Interleaved_style

* Reply using the --to, --cc, and --in-reply-to
  switches of git-send-email(1):

  git send-email \
    --in-reply-to=4B4F40E6.9040509@twiddle.net \
    --to=rth@twiddle.net \
    --cc=aurelien@aurel32.net \
    --cc=laurent.desnogues@gmail.com \
    --cc=qemu-devel@nongnu.org \
    /path/to/YOUR_REPLY

  https://kernel.org/pub/software/scm/git/docs/git-send-email.html

* If your mail client supports setting the In-Reply-To header
  via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line before the message body.
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox;
as well as URLs for NNTP newsgroup(s).