From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from mailman by lists.gnu.org with tmda-scanned (Exim 4.43) id 1NfGpy-0001aZ-B5 for qemu-devel@nongnu.org; Wed, 10 Feb 2010 12:58:54 -0500 Received: from [199.232.76.173] (port=53458 helo=monty-python.gnu.org) by lists.gnu.org with esmtp (Exim 4.43) id 1NfGpx-0001aR-V8 for qemu-devel@nongnu.org; Wed, 10 Feb 2010 12:58:53 -0500 Received: from Debian-exim by monty-python.gnu.org with spam-scanned (Exim 4.60) (envelope-from ) id 1NfGpw-0005kZ-5o for qemu-devel@nongnu.org; Wed, 10 Feb 2010 12:58:53 -0500 Received: from mail-qy0-f194.google.com ([209.85.221.194]:64322) by monty-python.gnu.org with esmtp (Exim 4.60) (envelope-from ) id 1NfGpv-0005kP-TM for qemu-devel@nongnu.org; Wed, 10 Feb 2010 12:58:52 -0500 Received: by qyk32 with SMTP id 32so253519qyk.18 for ; Wed, 10 Feb 2010 09:58:51 -0800 (PST) Message-ID: <4B72F3D5.4040504@codemonkey.ws> Date: Wed, 10 Feb 2010 11:58:45 -0600 From: Anthony Liguori MIME-Version: 1.0 Subject: Re: [Qemu-devel] [PATCH] Fix lost serial TX interrupts. Report receive overruns. References: <4B621A1B.6090309@FreeBSD.org> In-Reply-To: <4B621A1B.6090309@FreeBSD.org> Content-Type: text/plain; charset=ISO-8859-1; format=flowed Content-Transfer-Encoding: 7bit List-Id: qemu-devel.nongnu.org List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , To: gibbs@FreeBSD.org Cc: qemu-devel@nongnu.org On 01/28/2010 05:13 PM, Justin T. Gibbs wrote: > This patch compliments the patch submitted by Jergen Lock and further > improves the performance of QEMU's serial emulation with FreeBSD's > uart(9) driver. > > o Implement receive overrun status. The FreeBSD uart driver > relies on this status in it's probe routine to determine the size > of the FIFO supported. > o As per the 16550 spec, do not overwrite the RX FIFO on an RX overrun. > o Do not allow TX or RX FIFO overruns to increment the data valid count > beyond the size of the FIFO. > o For reads of the IIR register, only clear the "TX holding register > emtpy interrupt" if the read reports this interrupt. This is required > by the specification and avoids losing TX interrupts when other, > higher > priority interrupts (usually RX) are reported first. > > Signed-off-by: Justin T. Gibbs This patch is malformed. Please export the patch from a git tree via git-format-patch. Regards, Anthony Liguori > > --- serial.c.orig Thu Jan 14 15:18:00 2010 > +++ serial.c Thu Jan 28 15:36:04 2010 > @@ -169,11 +169,19 @@ > { > SerialFIFO *f = (fifo) ? &s->recv_fifo : &s->xmit_fifo; > > - f->data[f->head++] = chr; > + /* Receive overruns do not overwrite FIFO contents. */ > + if (fifo == XMIT_FIFO || f->count < UART_FIFO_LENGTH) { > > - if (f->head == UART_FIFO_LENGTH) > - f->head = 0; > - f->count++; > + f->data[f->head++] = chr; > + > + if (f->head == UART_FIFO_LENGTH) > + f->head = 0; > + } > + > + if (f->count < UART_FIFO_LENGTH) > + f->count++; > + else if (fifo == RECV_FIFO) > + s->lsr |= UART_LSR_OE; > > return 1; > } > @@ -533,8 +541,10 @@ > break; > case 2: > ret = s->iir; > + if (ret & UART_IIR_THRI) { > s->thr_ipending = 0; > - serial_update_irq(s); > + serial_update_irq(s); > + } > break; > case 3: > ret = s->lcr; > @@ -544,9 +554,9 @@ > break; > case 5: > ret = s->lsr; > - /* Clear break interrupt */ > - if (s->lsr & UART_LSR_BI) { > - s->lsr &= ~UART_LSR_BI; > + /* Clear break and overrun interrupts */ > + if (s->lsr & (UART_LSR_BI|UART_LSR_OE)) { > + s->lsr &= ~(UART_LSR_BI|UART_LSR_OE); > serial_update_irq(s); > } > break; > @@ -629,6 +639,8 @@ > /* call the timeout receive callback in 4 char transmit time */ > qemu_mod_timer(s->fifo_timeout_timer, qemu_get_clock > (vm_clock) + s->char_transmit_time * 4); > } else { > + if (s->lsr & UART_LSR_DR) > + s->lsr |= UART_LSR_OE; > s->rbr = buf[0]; > s->lsr |= UART_LSR_DR; > } > > > >