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Date: Wed, 03 Mar 2010 16:36:29 +0300
From: Maxim Kuvyrkov <maxim@codesourcery.com>
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Subject: Re: [Qemu-devel] [PATCH 3/4] Fix signal handling for ColdFire
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	<4B8C1660.5080009@codesourcery.com> <4B8E6181.7010104@twiddle.net>
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To: Richard Henderson <rth@twiddle.net>
Cc: qemu-devel@nongnu.org

On 3/3/10 4:17 PM, Richard Henderson wrote:
>> +  float64  sc_fpregs[2];  /* room for two fp registers */
> ...
>> - int f_fpcntl[3];
>> - int f_fpregs[8*3];
>> + uint32_t f_fpcntl[3];
>> + float64 f_fpregs[8];
>
> Surely these float64 uses are incorrect. The kernel uses 3*int
> at both of these places, which matches up with the 96-bit values
> in the regular m68k fpu.

ColdFire FPU registers are 64-bit wide, this is one of the difference 
between ColdFire and classic m68k.

The kernel patch to sigcontext.h to support ColdFire was merged several 
days ago at 
http://git.kernel.org/?p=linux/kernel/git/torvalds/linux-2.6.git;a=blob;f=arch/m68k/include/asm/sigcontext.h;h=1320eaa4cc2aab4b531a565c57ab62afb30bd0ec;hb=HEAD 
.

And thanks to your comment I noticed that an old version of the 
sigcontext patch was merged into the kernel in the above commit.  Will 
need to fix it.

Regards,

-- 
Maxim Kuvyrkov
CodeSourcery
maxim@codesourcery.com
(650) 331-3385 x724