From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from mailman by lists.gnu.org with tmda-scanned (Exim 4.43) id 1NpcEM-0005zr-A4 for qemu-devel@nongnu.org; Thu, 11 Mar 2010 01:50:50 -0500 Received: from [199.232.76.173] (port=39123 helo=monty-python.gnu.org) by lists.gnu.org with esmtp (Exim 4.43) id 1NpcEL-0005zO-Jp for qemu-devel@nongnu.org; Thu, 11 Mar 2010 01:50:49 -0500 Received: from Debian-exim by monty-python.gnu.org with spam-scanned (Exim 4.60) (envelope-from ) id 1NpcEK-0006BY-SQ for qemu-devel@nongnu.org; Thu, 11 Mar 2010 01:50:49 -0500 Received: from mx1.redhat.com ([209.132.183.28]:52943) by monty-python.gnu.org with esmtp (Exim 4.60) (envelope-from ) id 1NpcEK-0006BU-Fq for qemu-devel@nongnu.org; Thu, 11 Mar 2010 01:50:48 -0500 Message-ID: <4B9892B7.7030605@redhat.com> Date: Thu, 11 Mar 2010 08:50:31 +0200 From: Avi Kivity MIME-Version: 1.0 References: <1267833161-25267-1-git-send-email-cam@cs.ualberta.ca> <4B964709.6040202@redhat.com> <8286e4ee1003090844hb97d1c6lfd1216faf945a323@mail.gmail.com> <201003101504.22110.arnd@arndb.de> In-Reply-To: <201003101504.22110.arnd@arndb.de> Content-Type: text/plain; charset=ISO-8859-1; format=flowed Content-Transfer-Encoding: 7bit Subject: [Qemu-devel] Re: [PATCH] Inter-VM shared memory PCI device List-Id: qemu-devel.nongnu.org List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , To: Arnd Bergmann Cc: Cam Macdonell , qemu-devel@nongnu.org, kvm@vger.kernel.org On 03/10/2010 04:04 PM, Arnd Bergmann wrote: > On Tuesday 09 March 2010, Cam Macdonell wrote: > >>> We could make the masking in RAM, not in registers, like virtio, which would >>> require no exits. It would then be part of the application specific >>> protocol and out of scope of of this spec. >>> >>> >> This kind of implementation would be possible now since with UIO it's >> up to the application whether to mask interrupts or not and what >> interrupts mean. We could leave the interrupt mask register for those >> who want that behaviour. Arnd's idea would remove the need for the >> Doorbell and Mask, but we will always need at least one MMIO register >> to send whatever interrupts we do send. >> > You'd also have to be very careful if the notification is in RAM to > avoid races between one guest triggering an interrupt and another > guest clearing its interrupt mask. > > A totally different option that avoids this whole problem would > be to separate the signalling from the shared memory, making the > PCI shared memory device a trivial device with a single memory BAR, > and using something a higher-level concept like a virtio based > serial line for the actual signalling. > That would be much slower. The current scheme allows for an ioeventfd/irqfd short circuit which allows one guest to interrupt another without involving their qemus at all. -- error compiling committee.c: too many arguments to function