From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from mailman by lists.gnu.org with tmda-scanned (Exim 4.43) id 1NqiNi-0002DO-9P for qemu-devel@nongnu.org; Sun, 14 Mar 2010 03:37:02 -0400 Received: from [199.232.76.173] (port=60482 helo=monty-python.gnu.org) by lists.gnu.org with esmtp (Exim 4.43) id 1NqiNg-0002Cw-0s for qemu-devel@nongnu.org; Sun, 14 Mar 2010 03:37:00 -0400 Received: from Debian-exim by monty-python.gnu.org with spam-scanned (Exim 4.60) (envelope-from ) id 1NqiNe-0003gV-L3 for qemu-devel@nongnu.org; Sun, 14 Mar 2010 03:36:59 -0400 Received: from mx20.gnu.org ([199.232.41.8]:15249) by monty-python.gnu.org with esmtps (TLS-1.0:RSA_AES_256_CBC_SHA1:32) (Exim 4.60) (envelope-from ) id 1NqiNe-0003gN-6Y for qemu-devel@nongnu.org; Sun, 14 Mar 2010 03:36:58 -0400 Received: from mx1.redhat.com ([209.132.183.28]) by mx20.gnu.org with esmtp (Exim 4.60) (envelope-from ) id 1NqiNd-0007sQ-63 for qemu-devel@nongnu.org; Sun, 14 Mar 2010 03:36:57 -0400 Message-ID: <4B9C9214.5040202@redhat.com> Date: Sun, 14 Mar 2010 09:36:52 +0200 From: Avi Kivity MIME-Version: 1.0 References: <20100309015343.901738854@redhat.com> <20100309015644.133975091@redhat.com> <4B98AB49.4030209@redhat.com> <20100311185323.GC17264@amt.cnet> In-Reply-To: <20100311185323.GC17264@amt.cnet> Content-Type: text/plain; charset=ISO-8859-1; format=flowed Content-Transfer-Encoding: 7bit Subject: [Qemu-devel] Re: [patch 1/3] target-i386: print EFER in cpu_dump_state List-Id: qemu-devel.nongnu.org List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , To: Marcelo Tosatti Cc: qemu-devel@nongnu.org, kvm@vger.kernel.org On 03/11/2010 08:53 PM, Marcelo Tosatti wrote: > On Thu, Mar 11, 2010 at 10:35:21AM +0200, Avi Kivity wrote: > >> On 03/09/2010 03:53 AM, Marcelo Tosatti wrote: >> >>> Signed-off-by: Marcelo Tosatti >>> >>> Index: qemu-kvm-uq/target-i386/helper.c >>> =================================================================== >>> --- qemu-kvm-uq.orig/target-i386/helper.c >>> +++ qemu-kvm-uq/target-i386/helper.c >>> @@ -1176,6 +1176,7 @@ void cpu_dump_state(CPUState *env, FILE >>> cpu_x86_dump_seg_cache(env, f, cpu_fprintf, "TR",&env->tr); >>> >>> #ifdef TARGET_X86_64 >>> + cpu_fprintf(f, "EFER= %016" PRIx64 "\n", env->efer); >>> if (env->hflags& HF_LMA_MASK) { >>> cpu_fprintf(f, "GDT= %016" PRIx64 " %08x\n", >>> env->gdt.base, env->gdt.limit); >>> >>> >> Better to do this for i386 too, no? >> > "On systems that support IA-32e mode, the extended feature enable > register (IA32_EFER) is available. This model-specific register controls > activation of IA-32e mode and other IA-32e mode operations." > > Can it be useful for i386 too? > That's on Intel. AMDs had EFER before 64-bit support (for syscall support, and nx), IIRC. -- error compiling committee.c: too many arguments to function