* [Qemu-devel] [PATCH] remove remaining occurrences AREG[1-9] and TCG_AREG[1-9]
@ 2010-03-19 10:31 Paolo Bonzini
2010-03-23 20:52 ` Aurelien Jarno
2010-03-26 22:22 ` Aurelien Jarno
0 siblings, 2 replies; 7+ messages in thread
From: Paolo Bonzini @ 2010-03-19 10:31 UTC (permalink / raw)
To: qemu-devel
Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
---
dyngen-exec.h | 26 --------------------------
tcg/arm/tcg-target.h | 2 --
tcg/hppa/tcg-target.h | 2 --
tcg/i386/tcg-target.h | 2 --
tcg/mips/tcg-target.h | 2 --
tcg/ppc/tcg-target.h | 2 --
tcg/ppc64/tcg-target.h | 2 --
tcg/s390/tcg-target.h | 3 ---
tcg/sparc/tcg-target.h | 8 +-------
tcg/x86_64/tcg-target.h | 2 --
10 files changed, 1 insertions(+), 50 deletions(-)
diff --git a/dyngen-exec.h b/dyngen-exec.h
index 0353f36..d04eda8 100644
--- a/dyngen-exec.h
+++ b/dyngen-exec.h
@@ -50,62 +50,36 @@ extern int printf(const char *, ...);
#if defined(__i386__)
#define AREG0 "ebp"
-#define AREG1 "ebx"
-#define AREG2 "esi"
#elif defined(__x86_64__)
#define AREG0 "r14"
-#define AREG1 "r15"
-#define AREG2 "r12"
#elif defined(_ARCH_PPC)
#define AREG0 "r27"
-#define AREG1 "r24"
-#define AREG2 "r25"
#elif defined(__arm__)
#define AREG0 "r7"
-#define AREG1 "r4"
-#define AREG2 "r5"
#elif defined(__hppa__)
#define AREG0 "r17"
-#define AREG1 "r14"
-#define AREG2 "r15"
#elif defined(__mips__)
#define AREG0 "fp"
-#define AREG1 "s0"
-#define AREG2 "s1"
#elif defined(__sparc__)
#ifdef CONFIG_SOLARIS
#define AREG0 "g2"
-#define AREG1 "g3"
-#define AREG2 "g4"
#else
#ifdef __sparc_v9__
#define AREG0 "g5"
-#define AREG1 "g6"
-#define AREG2 "g7"
#else
#define AREG0 "g6"
-#define AREG1 "g1"
-#define AREG2 "g2"
#endif
#endif
#elif defined(__s390__)
#define AREG0 "r10"
-#define AREG1 "r7"
-#define AREG2 "r8"
#elif defined(__alpha__)
/* Note $15 is the frame pointer, so anything in op-i386.c that would
require a frame pointer, like alloca, would probably loose. */
#define AREG0 "$15"
-#define AREG1 "$9"
-#define AREG2 "$10"
#elif defined(__mc68000)
#define AREG0 "%a5"
-#define AREG1 "%a4"
-#define AREG2 "%d7"
#elif defined(__ia64__)
#define AREG0 "r7"
-#define AREG1 "r4"
-#define AREG2 "r5"
#else
#error unsupported CPU
#endif
diff --git a/tcg/arm/tcg-target.h b/tcg/arm/tcg-target.h
index 4cad967..7242be8 100644
--- a/tcg/arm/tcg-target.h
+++ b/tcg/arm/tcg-target.h
@@ -73,8 +73,6 @@ enum {
enum {
/* Note: must be synced with dyngen-exec.h */
TCG_AREG0 = TCG_REG_R7,
- TCG_AREG1 = TCG_REG_R4,
- TCG_AREG2 = TCG_REG_R5,
};
static inline void flush_icache_range(unsigned long start, unsigned long stop)
diff --git a/tcg/hppa/tcg-target.h b/tcg/hppa/tcg-target.h
index fa39bfc..e956e71 100644
--- a/tcg/hppa/tcg-target.h
+++ b/tcg/hppa/tcg-target.h
@@ -83,8 +83,6 @@ enum {
/* Note: must be synced with dyngen-exec.h */
#define TCG_AREG0 TCG_REG_R17
-#define TCG_AREG1 TCG_REG_R14
-#define TCG_AREG2 TCG_REG_R15
static inline void flush_icache_range(unsigned long start, unsigned long stop)
{
diff --git a/tcg/i386/tcg-target.h b/tcg/i386/tcg-target.h
index e994fd5..7bb765e 100644
--- a/tcg/i386/tcg-target.h
+++ b/tcg/i386/tcg-target.h
@@ -62,8 +62,6 @@ enum {
/* Note: must be synced with dyngen-exec.h */
#define TCG_AREG0 TCG_REG_EBP
-#define TCG_AREG1 TCG_REG_EBX
-#define TCG_AREG2 TCG_REG_ESI
static inline void flush_icache_range(unsigned long start, unsigned long stop)
{
diff --git a/tcg/mips/tcg-target.h b/tcg/mips/tcg-target.h
index 377b0c8..6b7741c 100644
--- a/tcg/mips/tcg-target.h
+++ b/tcg/mips/tcg-target.h
@@ -95,8 +95,6 @@ enum {
/* Note: must be synced with dyngen-exec.h */
#define TCG_AREG0 TCG_REG_FP
-#define TCG_AREG1 TCG_REG_S0
-#define TCG_AREG2 TCG_REG_S1
#include <sys/cachectl.h>
diff --git a/tcg/ppc/tcg-target.h b/tcg/ppc/tcg-target.h
index 0c71a11..5cae81f 100644
--- a/tcg/ppc/tcg-target.h
+++ b/tcg/ppc/tcg-target.h
@@ -91,7 +91,5 @@ enum {
#define TCG_TARGET_HAS_orc_i32
#define TCG_AREG0 TCG_REG_R27
-#define TCG_AREG1 TCG_REG_R24
-#define TCG_AREG2 TCG_REG_R25
#define TCG_TARGET_HAS_GUEST_BASE
diff --git a/tcg/ppc64/tcg-target.h b/tcg/ppc64/tcg-target.h
index f5de642..e367751 100644
--- a/tcg/ppc64/tcg-target.h
+++ b/tcg/ppc64/tcg-target.h
@@ -98,7 +98,5 @@ enum {
/* #define TCG_TARGET_HAS_orc_i64 */
#define TCG_AREG0 TCG_REG_R27
-#define TCG_AREG1 TCG_REG_R24
-#define TCG_AREG2 TCG_REG_R25
#define TCG_TARGET_HAS_GUEST_BASE
diff --git a/tcg/s390/tcg-target.h b/tcg/s390/tcg-target.h
index e803401..82e2be7 100644
--- a/tcg/s390/tcg-target.h
+++ b/tcg/s390/tcg-target.h
@@ -84,9 +84,6 @@ enum {
enum {
/* Note: must be synced with dyngen-exec.h */
TCG_AREG0 = TCG_REG_R10,
- TCG_AREG1 = TCG_REG_R7,
- TCG_AREG2 = TCG_REG_R8,
- TCG_AREG3 = TCG_REG_R9,
};
static inline void flush_icache_range(unsigned long start, unsigned long stop)
diff --git a/tcg/sparc/tcg-target.h b/tcg/sparc/tcg-target.h
index dbc574d..c27c284 100644
--- a/tcg/sparc/tcg-target.h
+++ b/tcg/sparc/tcg-target.h
@@ -119,19 +119,13 @@ enum {
#define TCG_TARGET_HAS_orc_i64
#endif
-/* Note: must be synced with dyngen-exec.h and Makefile.target */
+/* Note: must be synced with dyngen-exec.h */
#ifdef CONFIG_SOLARIS
#define TCG_AREG0 TCG_REG_G2
-#define TCG_AREG1 TCG_REG_G3
-#define TCG_AREG2 TCG_REG_G4
#elif defined(__sparc_v9__)
#define TCG_AREG0 TCG_REG_G5
-#define TCG_AREG1 TCG_REG_G6
-#define TCG_AREG2 TCG_REG_G7
#else
#define TCG_AREG0 TCG_REG_G6
-#define TCG_AREG1 TCG_REG_G1
-#define TCG_AREG2 TCG_REG_G2
#endif
static inline void flush_icache_range(unsigned long start, unsigned long stop)
diff --git a/tcg/x86_64/tcg-target.h b/tcg/x86_64/tcg-target.h
index d1e8b9e..02448b5 100644
--- a/tcg/x86_64/tcg-target.h
+++ b/tcg/x86_64/tcg-target.h
@@ -89,8 +89,6 @@ enum {
/* Note: must be synced with dyngen-exec.h */
#define TCG_AREG0 TCG_REG_R14
-#define TCG_AREG1 TCG_REG_R15
-#define TCG_AREG2 TCG_REG_R12
static inline void flush_icache_range(unsigned long start, unsigned long stop)
{
--
1.6.6.1
^ permalink raw reply related [flat|nested] 7+ messages in thread
* Re: [Qemu-devel] [PATCH] remove remaining occurrences AREG[1-9] and TCG_AREG[1-9]
2010-03-19 10:31 [Qemu-devel] [PATCH] remove remaining occurrences AREG[1-9] and TCG_AREG[1-9] Paolo Bonzini
@ 2010-03-23 20:52 ` Aurelien Jarno
2010-03-26 22:22 ` Aurelien Jarno
1 sibling, 0 replies; 7+ messages in thread
From: Aurelien Jarno @ 2010-03-23 20:52 UTC (permalink / raw)
To: Paolo Bonzini; +Cc: qemu-devel
On Fri, Mar 19, 2010 at 11:31:15AM +0100, Paolo Bonzini wrote:
> Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
> ---
> dyngen-exec.h | 26 --------------------------
> tcg/arm/tcg-target.h | 2 --
> tcg/hppa/tcg-target.h | 2 --
> tcg/i386/tcg-target.h | 2 --
> tcg/mips/tcg-target.h | 2 --
> tcg/ppc/tcg-target.h | 2 --
> tcg/ppc64/tcg-target.h | 2 --
> tcg/s390/tcg-target.h | 3 ---
> tcg/sparc/tcg-target.h | 8 +-------
> tcg/x86_64/tcg-target.h | 2 --
> 10 files changed, 1 insertions(+), 50 deletions(-)
Acked-by: Aurelien Jarno <aurelien@aurel32.net>
> diff --git a/dyngen-exec.h b/dyngen-exec.h
> index 0353f36..d04eda8 100644
> --- a/dyngen-exec.h
> +++ b/dyngen-exec.h
> @@ -50,62 +50,36 @@ extern int printf(const char *, ...);
>
> #if defined(__i386__)
> #define AREG0 "ebp"
> -#define AREG1 "ebx"
> -#define AREG2 "esi"
> #elif defined(__x86_64__)
> #define AREG0 "r14"
> -#define AREG1 "r15"
> -#define AREG2 "r12"
> #elif defined(_ARCH_PPC)
> #define AREG0 "r27"
> -#define AREG1 "r24"
> -#define AREG2 "r25"
> #elif defined(__arm__)
> #define AREG0 "r7"
> -#define AREG1 "r4"
> -#define AREG2 "r5"
> #elif defined(__hppa__)
> #define AREG0 "r17"
> -#define AREG1 "r14"
> -#define AREG2 "r15"
> #elif defined(__mips__)
> #define AREG0 "fp"
> -#define AREG1 "s0"
> -#define AREG2 "s1"
> #elif defined(__sparc__)
> #ifdef CONFIG_SOLARIS
> #define AREG0 "g2"
> -#define AREG1 "g3"
> -#define AREG2 "g4"
> #else
> #ifdef __sparc_v9__
> #define AREG0 "g5"
> -#define AREG1 "g6"
> -#define AREG2 "g7"
> #else
> #define AREG0 "g6"
> -#define AREG1 "g1"
> -#define AREG2 "g2"
> #endif
> #endif
> #elif defined(__s390__)
> #define AREG0 "r10"
> -#define AREG1 "r7"
> -#define AREG2 "r8"
> #elif defined(__alpha__)
> /* Note $15 is the frame pointer, so anything in op-i386.c that would
> require a frame pointer, like alloca, would probably loose. */
> #define AREG0 "$15"
> -#define AREG1 "$9"
> -#define AREG2 "$10"
> #elif defined(__mc68000)
> #define AREG0 "%a5"
> -#define AREG1 "%a4"
> -#define AREG2 "%d7"
> #elif defined(__ia64__)
> #define AREG0 "r7"
> -#define AREG1 "r4"
> -#define AREG2 "r5"
> #else
> #error unsupported CPU
> #endif
> diff --git a/tcg/arm/tcg-target.h b/tcg/arm/tcg-target.h
> index 4cad967..7242be8 100644
> --- a/tcg/arm/tcg-target.h
> +++ b/tcg/arm/tcg-target.h
> @@ -73,8 +73,6 @@ enum {
> enum {
> /* Note: must be synced with dyngen-exec.h */
> TCG_AREG0 = TCG_REG_R7,
> - TCG_AREG1 = TCG_REG_R4,
> - TCG_AREG2 = TCG_REG_R5,
> };
>
> static inline void flush_icache_range(unsigned long start, unsigned long stop)
> diff --git a/tcg/hppa/tcg-target.h b/tcg/hppa/tcg-target.h
> index fa39bfc..e956e71 100644
> --- a/tcg/hppa/tcg-target.h
> +++ b/tcg/hppa/tcg-target.h
> @@ -83,8 +83,6 @@ enum {
>
> /* Note: must be synced with dyngen-exec.h */
> #define TCG_AREG0 TCG_REG_R17
> -#define TCG_AREG1 TCG_REG_R14
> -#define TCG_AREG2 TCG_REG_R15
>
> static inline void flush_icache_range(unsigned long start, unsigned long stop)
> {
> diff --git a/tcg/i386/tcg-target.h b/tcg/i386/tcg-target.h
> index e994fd5..7bb765e 100644
> --- a/tcg/i386/tcg-target.h
> +++ b/tcg/i386/tcg-target.h
> @@ -62,8 +62,6 @@ enum {
>
> /* Note: must be synced with dyngen-exec.h */
> #define TCG_AREG0 TCG_REG_EBP
> -#define TCG_AREG1 TCG_REG_EBX
> -#define TCG_AREG2 TCG_REG_ESI
>
> static inline void flush_icache_range(unsigned long start, unsigned long stop)
> {
> diff --git a/tcg/mips/tcg-target.h b/tcg/mips/tcg-target.h
> index 377b0c8..6b7741c 100644
> --- a/tcg/mips/tcg-target.h
> +++ b/tcg/mips/tcg-target.h
> @@ -95,8 +95,6 @@ enum {
>
> /* Note: must be synced with dyngen-exec.h */
> #define TCG_AREG0 TCG_REG_FP
> -#define TCG_AREG1 TCG_REG_S0
> -#define TCG_AREG2 TCG_REG_S1
>
> #include <sys/cachectl.h>
>
> diff --git a/tcg/ppc/tcg-target.h b/tcg/ppc/tcg-target.h
> index 0c71a11..5cae81f 100644
> --- a/tcg/ppc/tcg-target.h
> +++ b/tcg/ppc/tcg-target.h
> @@ -91,7 +91,5 @@ enum {
> #define TCG_TARGET_HAS_orc_i32
>
> #define TCG_AREG0 TCG_REG_R27
> -#define TCG_AREG1 TCG_REG_R24
> -#define TCG_AREG2 TCG_REG_R25
>
> #define TCG_TARGET_HAS_GUEST_BASE
> diff --git a/tcg/ppc64/tcg-target.h b/tcg/ppc64/tcg-target.h
> index f5de642..e367751 100644
> --- a/tcg/ppc64/tcg-target.h
> +++ b/tcg/ppc64/tcg-target.h
> @@ -98,7 +98,5 @@ enum {
> /* #define TCG_TARGET_HAS_orc_i64 */
>
> #define TCG_AREG0 TCG_REG_R27
> -#define TCG_AREG1 TCG_REG_R24
> -#define TCG_AREG2 TCG_REG_R25
>
> #define TCG_TARGET_HAS_GUEST_BASE
> diff --git a/tcg/s390/tcg-target.h b/tcg/s390/tcg-target.h
> index e803401..82e2be7 100644
> --- a/tcg/s390/tcg-target.h
> +++ b/tcg/s390/tcg-target.h
> @@ -84,9 +84,6 @@ enum {
> enum {
> /* Note: must be synced with dyngen-exec.h */
> TCG_AREG0 = TCG_REG_R10,
> - TCG_AREG1 = TCG_REG_R7,
> - TCG_AREG2 = TCG_REG_R8,
> - TCG_AREG3 = TCG_REG_R9,
> };
>
> static inline void flush_icache_range(unsigned long start, unsigned long stop)
> diff --git a/tcg/sparc/tcg-target.h b/tcg/sparc/tcg-target.h
> index dbc574d..c27c284 100644
> --- a/tcg/sparc/tcg-target.h
> +++ b/tcg/sparc/tcg-target.h
> @@ -119,19 +119,13 @@ enum {
> #define TCG_TARGET_HAS_orc_i64
> #endif
>
> -/* Note: must be synced with dyngen-exec.h and Makefile.target */
> +/* Note: must be synced with dyngen-exec.h */
> #ifdef CONFIG_SOLARIS
> #define TCG_AREG0 TCG_REG_G2
> -#define TCG_AREG1 TCG_REG_G3
> -#define TCG_AREG2 TCG_REG_G4
> #elif defined(__sparc_v9__)
> #define TCG_AREG0 TCG_REG_G5
> -#define TCG_AREG1 TCG_REG_G6
> -#define TCG_AREG2 TCG_REG_G7
> #else
> #define TCG_AREG0 TCG_REG_G6
> -#define TCG_AREG1 TCG_REG_G1
> -#define TCG_AREG2 TCG_REG_G2
> #endif
>
> static inline void flush_icache_range(unsigned long start, unsigned long stop)
> diff --git a/tcg/x86_64/tcg-target.h b/tcg/x86_64/tcg-target.h
> index d1e8b9e..02448b5 100644
> --- a/tcg/x86_64/tcg-target.h
> +++ b/tcg/x86_64/tcg-target.h
> @@ -89,8 +89,6 @@ enum {
>
> /* Note: must be synced with dyngen-exec.h */
> #define TCG_AREG0 TCG_REG_R14
> -#define TCG_AREG1 TCG_REG_R15
> -#define TCG_AREG2 TCG_REG_R12
>
> static inline void flush_icache_range(unsigned long start, unsigned long stop)
> {
> --
> 1.6.6.1
>
>
>
>
--
Aurelien Jarno GPG: 1024D/F1BCDB73
aurelien@aurel32.net http://www.aurel32.net
^ permalink raw reply [flat|nested] 7+ messages in thread
* [Qemu-devel] Question about memory micro operations in Qemu 0.12.x
@ 2010-03-26 20:23 coopht
[not found] ` <20100327094900.GA4172@zubnet.me.uk>
0 siblings, 1 reply; 7+ messages in thread
From: coopht @ 2010-03-26 20:23 UTC (permalink / raw)
To: qemu-devel
Hello.
in qemu 0.9.x there was a special file with micro-operations, which
implemented access to memory. For example for arm architecture it was
op_mem.h file. I was able to add some printfs to this functions and get
information about memory accesses.
My question is : how memory access microoperations are now implemented
in qemu 0.12.x ?
Thanks for you answers.
^ permalink raw reply [flat|nested] 7+ messages in thread
* Re: [Qemu-devel] [PATCH] remove remaining occurrences AREG[1-9] and TCG_AREG[1-9]
2010-03-19 10:31 [Qemu-devel] [PATCH] remove remaining occurrences AREG[1-9] and TCG_AREG[1-9] Paolo Bonzini
2010-03-23 20:52 ` Aurelien Jarno
@ 2010-03-26 22:22 ` Aurelien Jarno
2010-03-27 6:20 ` [Qemu-devel] Question about memory micro operations in Qemu 0.12.x coopht
1 sibling, 1 reply; 7+ messages in thread
From: Aurelien Jarno @ 2010-03-26 22:22 UTC (permalink / raw)
To: Paolo Bonzini; +Cc: qemu-devel
On Fri, Mar 19, 2010 at 11:31:15AM +0100, Paolo Bonzini wrote:
> Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
> ---
> dyngen-exec.h | 26 --------------------------
> tcg/arm/tcg-target.h | 2 --
> tcg/hppa/tcg-target.h | 2 --
> tcg/i386/tcg-target.h | 2 --
> tcg/mips/tcg-target.h | 2 --
> tcg/ppc/tcg-target.h | 2 --
> tcg/ppc64/tcg-target.h | 2 --
> tcg/s390/tcg-target.h | 3 ---
> tcg/sparc/tcg-target.h | 8 +-------
> tcg/x86_64/tcg-target.h | 2 --
> 10 files changed, 1 insertions(+), 50 deletions(-)
Thanks, applied.
> diff --git a/dyngen-exec.h b/dyngen-exec.h
> index 0353f36..d04eda8 100644
> --- a/dyngen-exec.h
> +++ b/dyngen-exec.h
> @@ -50,62 +50,36 @@ extern int printf(const char *, ...);
>
> #if defined(__i386__)
> #define AREG0 "ebp"
> -#define AREG1 "ebx"
> -#define AREG2 "esi"
> #elif defined(__x86_64__)
> #define AREG0 "r14"
> -#define AREG1 "r15"
> -#define AREG2 "r12"
> #elif defined(_ARCH_PPC)
> #define AREG0 "r27"
> -#define AREG1 "r24"
> -#define AREG2 "r25"
> #elif defined(__arm__)
> #define AREG0 "r7"
> -#define AREG1 "r4"
> -#define AREG2 "r5"
> #elif defined(__hppa__)
> #define AREG0 "r17"
> -#define AREG1 "r14"
> -#define AREG2 "r15"
> #elif defined(__mips__)
> #define AREG0 "fp"
> -#define AREG1 "s0"
> -#define AREG2 "s1"
> #elif defined(__sparc__)
> #ifdef CONFIG_SOLARIS
> #define AREG0 "g2"
> -#define AREG1 "g3"
> -#define AREG2 "g4"
> #else
> #ifdef __sparc_v9__
> #define AREG0 "g5"
> -#define AREG1 "g6"
> -#define AREG2 "g7"
> #else
> #define AREG0 "g6"
> -#define AREG1 "g1"
> -#define AREG2 "g2"
> #endif
> #endif
> #elif defined(__s390__)
> #define AREG0 "r10"
> -#define AREG1 "r7"
> -#define AREG2 "r8"
> #elif defined(__alpha__)
> /* Note $15 is the frame pointer, so anything in op-i386.c that would
> require a frame pointer, like alloca, would probably loose. */
> #define AREG0 "$15"
> -#define AREG1 "$9"
> -#define AREG2 "$10"
> #elif defined(__mc68000)
> #define AREG0 "%a5"
> -#define AREG1 "%a4"
> -#define AREG2 "%d7"
> #elif defined(__ia64__)
> #define AREG0 "r7"
> -#define AREG1 "r4"
> -#define AREG2 "r5"
> #else
> #error unsupported CPU
> #endif
> diff --git a/tcg/arm/tcg-target.h b/tcg/arm/tcg-target.h
> index 4cad967..7242be8 100644
> --- a/tcg/arm/tcg-target.h
> +++ b/tcg/arm/tcg-target.h
> @@ -73,8 +73,6 @@ enum {
> enum {
> /* Note: must be synced with dyngen-exec.h */
> TCG_AREG0 = TCG_REG_R7,
> - TCG_AREG1 = TCG_REG_R4,
> - TCG_AREG2 = TCG_REG_R5,
> };
>
> static inline void flush_icache_range(unsigned long start, unsigned long stop)
> diff --git a/tcg/hppa/tcg-target.h b/tcg/hppa/tcg-target.h
> index fa39bfc..e956e71 100644
> --- a/tcg/hppa/tcg-target.h
> +++ b/tcg/hppa/tcg-target.h
> @@ -83,8 +83,6 @@ enum {
>
> /* Note: must be synced with dyngen-exec.h */
> #define TCG_AREG0 TCG_REG_R17
> -#define TCG_AREG1 TCG_REG_R14
> -#define TCG_AREG2 TCG_REG_R15
>
> static inline void flush_icache_range(unsigned long start, unsigned long stop)
> {
> diff --git a/tcg/i386/tcg-target.h b/tcg/i386/tcg-target.h
> index e994fd5..7bb765e 100644
> --- a/tcg/i386/tcg-target.h
> +++ b/tcg/i386/tcg-target.h
> @@ -62,8 +62,6 @@ enum {
>
> /* Note: must be synced with dyngen-exec.h */
> #define TCG_AREG0 TCG_REG_EBP
> -#define TCG_AREG1 TCG_REG_EBX
> -#define TCG_AREG2 TCG_REG_ESI
>
> static inline void flush_icache_range(unsigned long start, unsigned long stop)
> {
> diff --git a/tcg/mips/tcg-target.h b/tcg/mips/tcg-target.h
> index 377b0c8..6b7741c 100644
> --- a/tcg/mips/tcg-target.h
> +++ b/tcg/mips/tcg-target.h
> @@ -95,8 +95,6 @@ enum {
>
> /* Note: must be synced with dyngen-exec.h */
> #define TCG_AREG0 TCG_REG_FP
> -#define TCG_AREG1 TCG_REG_S0
> -#define TCG_AREG2 TCG_REG_S1
>
> #include <sys/cachectl.h>
>
> diff --git a/tcg/ppc/tcg-target.h b/tcg/ppc/tcg-target.h
> index 0c71a11..5cae81f 100644
> --- a/tcg/ppc/tcg-target.h
> +++ b/tcg/ppc/tcg-target.h
> @@ -91,7 +91,5 @@ enum {
> #define TCG_TARGET_HAS_orc_i32
>
> #define TCG_AREG0 TCG_REG_R27
> -#define TCG_AREG1 TCG_REG_R24
> -#define TCG_AREG2 TCG_REG_R25
>
> #define TCG_TARGET_HAS_GUEST_BASE
> diff --git a/tcg/ppc64/tcg-target.h b/tcg/ppc64/tcg-target.h
> index f5de642..e367751 100644
> --- a/tcg/ppc64/tcg-target.h
> +++ b/tcg/ppc64/tcg-target.h
> @@ -98,7 +98,5 @@ enum {
> /* #define TCG_TARGET_HAS_orc_i64 */
>
> #define TCG_AREG0 TCG_REG_R27
> -#define TCG_AREG1 TCG_REG_R24
> -#define TCG_AREG2 TCG_REG_R25
>
> #define TCG_TARGET_HAS_GUEST_BASE
> diff --git a/tcg/s390/tcg-target.h b/tcg/s390/tcg-target.h
> index e803401..82e2be7 100644
> --- a/tcg/s390/tcg-target.h
> +++ b/tcg/s390/tcg-target.h
> @@ -84,9 +84,6 @@ enum {
> enum {
> /* Note: must be synced with dyngen-exec.h */
> TCG_AREG0 = TCG_REG_R10,
> - TCG_AREG1 = TCG_REG_R7,
> - TCG_AREG2 = TCG_REG_R8,
> - TCG_AREG3 = TCG_REG_R9,
> };
>
> static inline void flush_icache_range(unsigned long start, unsigned long stop)
> diff --git a/tcg/sparc/tcg-target.h b/tcg/sparc/tcg-target.h
> index dbc574d..c27c284 100644
> --- a/tcg/sparc/tcg-target.h
> +++ b/tcg/sparc/tcg-target.h
> @@ -119,19 +119,13 @@ enum {
> #define TCG_TARGET_HAS_orc_i64
> #endif
>
> -/* Note: must be synced with dyngen-exec.h and Makefile.target */
> +/* Note: must be synced with dyngen-exec.h */
> #ifdef CONFIG_SOLARIS
> #define TCG_AREG0 TCG_REG_G2
> -#define TCG_AREG1 TCG_REG_G3
> -#define TCG_AREG2 TCG_REG_G4
> #elif defined(__sparc_v9__)
> #define TCG_AREG0 TCG_REG_G5
> -#define TCG_AREG1 TCG_REG_G6
> -#define TCG_AREG2 TCG_REG_G7
> #else
> #define TCG_AREG0 TCG_REG_G6
> -#define TCG_AREG1 TCG_REG_G1
> -#define TCG_AREG2 TCG_REG_G2
> #endif
>
> static inline void flush_icache_range(unsigned long start, unsigned long stop)
> diff --git a/tcg/x86_64/tcg-target.h b/tcg/x86_64/tcg-target.h
> index d1e8b9e..02448b5 100644
> --- a/tcg/x86_64/tcg-target.h
> +++ b/tcg/x86_64/tcg-target.h
> @@ -89,8 +89,6 @@ enum {
>
> /* Note: must be synced with dyngen-exec.h */
> #define TCG_AREG0 TCG_REG_R14
> -#define TCG_AREG1 TCG_REG_R15
> -#define TCG_AREG2 TCG_REG_R12
>
> static inline void flush_icache_range(unsigned long start, unsigned long stop)
> {
> --
> 1.6.6.1
>
>
>
--
Aurelien Jarno GPG: 1024D/F1BCDB73
aurelien@aurel32.net http://www.aurel32.net
^ permalink raw reply [flat|nested] 7+ messages in thread
* [Qemu-devel] Question about memory micro operations in Qemu 0.12.x
2010-03-26 22:22 ` Aurelien Jarno
@ 2010-03-27 6:20 ` coopht
2010-03-27 9:52 ` Stuart Brady
0 siblings, 1 reply; 7+ messages in thread
From: coopht @ 2010-03-27 6:20 UTC (permalink / raw)
To: qemu-devel
Hello.
in qemu 0.9.x there was a special file with micro-operations, which
implemented access to memory. For example for arm architecture it was
op_mem.h file. I was able to add some printfs to this functions and get
information about memory accesses.
My question is : how memory access microoperations are now implemented
in qemu 0.12.x ?
Thanks for you answers.
^ permalink raw reply [flat|nested] 7+ messages in thread
* Re: [Qemu-devel] Question about memory micro operations in Qemu 0.12.x
2010-03-27 6:20 ` [Qemu-devel] Question about memory micro operations in Qemu 0.12.x coopht
@ 2010-03-27 9:52 ` Stuart Brady
0 siblings, 0 replies; 7+ messages in thread
From: Stuart Brady @ 2010-03-27 9:52 UTC (permalink / raw)
To: qemu-devel
On Sat, Mar 27, 2010 at 09:20:51AM +0300, coopht@gmail.com wrote:
> My question is : how memory access microoperations are now
> implemented in qemu 0.12.x ?
We heard you the first time. :-)
Cheers,
--
Stuart Brady
^ permalink raw reply [flat|nested] 7+ messages in thread
* Re: [Qemu-devel] Question about memory micro operations in Qemu 0.12.x
[not found] ` <20100327094900.GA4172@zubnet.me.uk>
@ 2010-03-29 7:30 ` Alexander
0 siblings, 0 replies; 7+ messages in thread
From: Alexander @ 2010-03-29 7:30 UTC (permalink / raw)
To: qemu-devel, coopht
Thank you for your answer.
I still have some questions.
27.03.2010 12:49, Stuart Brady пишет:
> On Fri, Mar 26, 2010 at 11:23:30PM +0300, coopht@gmail.com wrote:
>
>> Hello.
>> in qemu 0.9.x there was a special file with micro-operations, which
>> implemented access to memory. For example for arm architecture it
>> was op_mem.h file. I was able to add some printfs to this functions
>> and get information about memory accesses.
>>
>> My question is : how memory access microoperations are now
>> implemented in qemu 0.12.x ?
>>
>> Thanks for you answers.
>>
> To generate load and store operations, tcg_gen_qemu_{ld,st}*() are now
> used. See tcg/README for more information on TCG ops.
>
> In tcg/*/tcg-target.c, you'll find tcg_out_qemu_{ld,st}(). The easiest
> way to do this would probably be to place your printfs in __ld_mmu() and
> __st_mmu() (which are defined via softmmu_template.h), and remove the
> TLB lookups from tcg_out_qemu_{ld,st}() so that your tracing code is
> always called.
>
1. How can I remove TLB lookups from tcg_out_qemu_{ld,st} ?
> Instead of modifying tcg_out_qemu_{ld,st}(), you might also be able to
> bypass it entirely, by using having tcg_gen_qemu_{ld,st}*() generate
> calls to a helper function.
>
2. Can you give me some examples of it ?
> Cheers,
>
Thanks for your help.
^ permalink raw reply [flat|nested] 7+ messages in thread
end of thread, other threads:[~2010-03-29 7:31 UTC | newest]
Thread overview: 7+ messages (download: mbox.gz follow: Atom feed
-- links below jump to the message on this page --
2010-03-19 10:31 [Qemu-devel] [PATCH] remove remaining occurrences AREG[1-9] and TCG_AREG[1-9] Paolo Bonzini
2010-03-23 20:52 ` Aurelien Jarno
2010-03-26 22:22 ` Aurelien Jarno
2010-03-27 6:20 ` [Qemu-devel] Question about memory micro operations in Qemu 0.12.x coopht
2010-03-27 9:52 ` Stuart Brady
-- strict thread matches above, loose matches on Subject: below --
2010-03-26 20:23 coopht
[not found] ` <20100327094900.GA4172@zubnet.me.uk>
2010-03-29 7:30 ` Alexander
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