From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from mailman by lists.gnu.org with tmda-scanned (Exim 4.43) id 1Nzzat-0003Wx-CQ for qemu-devel@nongnu.org; Thu, 08 Apr 2010 17:48:59 -0400 Received: from [140.186.70.92] (port=38804 helo=eggs.gnu.org) by lists.gnu.org with esmtp (Exim 4.43) id 1Nzzas-0003WI-2N for qemu-devel@nongnu.org; Thu, 08 Apr 2010 17:48:58 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.69) (envelope-from ) id 1Nzzaq-0003fv-Ji for qemu-devel@nongnu.org; Thu, 08 Apr 2010 17:48:57 -0400 Received: from are.twiddle.net ([75.149.56.221]:42478) by eggs.gnu.org with esmtp (Exim 4.69) (envelope-from ) id 1Nzzaq-0003fV-E2 for qemu-devel@nongnu.org; Thu, 08 Apr 2010 17:48:56 -0400 Message-ID: <4BBE4F46.7090307@twiddle.net> Date: Thu, 08 Apr 2010 14:48:54 -0700 From: Richard Henderson MIME-Version: 1.0 Subject: Re: [Qemu-devel] [PATCH 2/4] tcg-hppa: Finish the port. References: <4BBC7304.7020508@aurel32.net> <3f11350da2fbc94c0095c66883bc27fa4858c883.1270682952.git.rth@twiddle.net> <20100408095612.GC17138@volta.aurel32.net> <4BBE0529.7000404@twiddle.net> In-Reply-To: <4BBE0529.7000404@twiddle.net> Content-Type: text/plain; charset=ISO-8859-15 Content-Transfer-Encoding: 7bit List-Id: qemu-devel.nongnu.org List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , To: Aurelien Jarno Cc: qemu-devel@nongnu.org On 04/08/2010 09:32 AM, Richard Henderson wrote: >>> +static void tcg_out_ori(TCGContext *s, int ret, int arg, tcg_target_ulong m) >>> +{ >>> + if (m == 0) { >>> + tcg_out_mov(s, ret, arg); >>> + } else if (m == -1) { >>> + tcg_out_movi(s, TCG_TYPE_I32, ret, -1); >> >> Those cases are already eliminated in tcg/tcg-op.h. This code looks >> redundant. > > The cases eliminated in tcg-op.h are with immediate constants. > There is no generic code in tcg.c to eliminate these cases > after constant propagation. However, I can remove them with... For the record, a real case that appears in linux-test-0.3 sparc: 0x435e8ac4: andcc %g0, %g0, %o4 ---- 0x435e8ac4 movi_i32 tmp19,$0x0 movi_i32 tmp20,$0x0 and_i32 loc4,tmp19,tmp20 mov_i32 cc_dst,loc4 movi_i32 cc_op,$0xb st_i32 loc4,regwptr,$0x10 The and_i32 there is "loc4 = 0 & 0". I've no idea why the original sparc code uses this instruction. r~