From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from mailman by lists.gnu.org with tmda-scanned (Exim 4.43) id 1O1MBW-0003aZ-Q3 for qemu-devel@nongnu.org; Mon, 12 Apr 2010 12:08:26 -0400 Received: from [140.186.70.92] (port=35868 helo=eggs.gnu.org) by lists.gnu.org with esmtp (Exim 4.43) id 1O1MBV-0003Zj-86 for qemu-devel@nongnu.org; Mon, 12 Apr 2010 12:08:26 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.69) (envelope-from ) id 1O1MBS-0007Rj-HO for qemu-devel@nongnu.org; Mon, 12 Apr 2010 12:08:24 -0400 Received: from mx1.redhat.com ([209.132.183.28]:16580) by eggs.gnu.org with esmtp (Exim 4.69) (envelope-from ) id 1O1MBS-0007RU-8w for qemu-devel@nongnu.org; Mon, 12 Apr 2010 12:08:22 -0400 Message-ID: <4BC34564.9080904@redhat.com> Date: Mon, 12 Apr 2010 19:08:04 +0300 From: Avi Kivity MIME-Version: 1.0 Subject: Re: [Qemu-devel] [RFC] Host vs Guest memory allocation References: <4BBA6803.3000008@twiddle.net> <20100405231821.GA27894@volta.aurel32.net> <4BC3088E.5080603@redhat.com> <4BC3345A.6090401@twiddle.net> <4BC337C2.2090500@redhat.com> <4BC3410A.2040506@redhat.com> In-Reply-To: Content-Type: text/plain; charset=ISO-8859-1; format=flowed Content-Transfer-Encoding: 7bit List-Id: qemu-devel.nongnu.org List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , To: Alexander Graf Cc: qemu-devel Developers , Aurelien Jarno , Richard Henderson On 04/12/2010 06:56 PM, Alexander Graf wrote: > > For fully system emulation on the other hand I can imagine quite some nice tricks one could pull. > > On PPC hosts you get a huge number of VSIDs that are basically like tags on the TLB. So if you'd give every x86 page table one VSID you'd potentially have really great and fast shadow PTEs. > You mean, if you have lots of ppc machines but no x86? smp would be a problem because of the relaxed memory model (of course tcg needs a lot of work before it can do smp anyway). > On x86 hosts you can just keep several page tables around. You can then map for example every combination of guest VSIDs to one page table each. > Yeah. > I'm sure there are similar fun things you can do with the other supported archs. The hard part is to come up with something generic enough so it works on all hosts and guests with little effort. Oh well :) > Well, x86 page tables are pretty flexible, the memory model is strict, the atomics are rich, and you have both unaligned and trapping accesses. So if you restrict yourself to x86 hosts I think you can do anything with page size >= 4k. Run both user and kernel mode in guest user mode, do tcg and mmu in kernel mode. Should be fun. -- I have a truly marvellous patch that fixes the bug which this signature is too narrow to contain.