From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from mailman by lists.gnu.org with tmda-scanned (Exim 4.43) id 1O3W1e-0001wi-Q9 for qemu-devel@nongnu.org; Sun, 18 Apr 2010 11:03:10 -0400 Received: from [140.186.70.92] (port=60260 helo=eggs.gnu.org) by lists.gnu.org with esmtp (Exim 4.43) id 1O3W1d-0001vr-Ny for qemu-devel@nongnu.org; Sun, 18 Apr 2010 11:03:10 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.69) (envelope-from ) id 1O3W1c-0000GA-Eu for qemu-devel@nongnu.org; Sun, 18 Apr 2010 11:03:09 -0400 Received: from mail-yx0-f191.google.com ([209.85.210.191]:39177) by eggs.gnu.org with esmtp (Exim 4.69) (envelope-from ) id 1O3W1c-0000G5-CF for qemu-devel@nongnu.org; Sun, 18 Apr 2010 11:03:08 -0400 Received: by yxe29 with SMTP id 29so2037815yxe.4 for ; Sun, 18 Apr 2010 08:03:07 -0700 (PDT) Sender: Richard Henderson Message-ID: <4BCB1F1D.1020202@twiddle.net> Date: Sun, 18 Apr 2010 10:02:53 -0500 From: Richard Henderson MIME-Version: 1.0 Subject: Re: [Qemu-devel] Re: [PATCH 2/3] target-sparc: Free instruction temporaries. References: <1271429444-900-1-git-send-email-rth@twiddle.net> <1271429444-900-2-git-send-email-rth@twiddle.net> <4BC9F4AC.1080001@twiddle.net> In-Reply-To: Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 7bit List-Id: qemu-devel.nongnu.org List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , To: Blue Swirl Cc: qemu-devel@nongnu.org On 04/17/2010 01:41 PM, Blue Swirl wrote: > Yes, but we would still gain the small optimizations for add by 0, and > with 0xffffffff etc. in tcg-op.h. Sparc QEMU target generates a lot of > those because of poor constant formation choices made by the guest > compilers. Another thing that gets fixed by Aurelien's constant prop patch. Don't think that Sparc is alone in generating x+0 in a way that gets past the tcg-op.h checks. > By the way, do you think constant pool approach (put constants at the > end of TB) would be useful, especially for 64 bit constants? Probably. The support for that could probably be leveraged to move the TLB miss code path out of line as well. r~