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Date: Thu, 10 Jun 2010 15:04:04 -0700
From: Richard Henderson <rth@twiddle.net>
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Subject: Re: [Qemu-devel] [PATCH 05/35] tcg-s390: Icache flush is a no-op.
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To: Aurelien Jarno <aurelien@aurel32.net>
Cc: qemu-devel@nongnu.org, agraf@suse.de

On 06/09/2010 03:55 PM, Aurelien Jarno wrote:
> On Fri, Jun 04, 2010 at 12:14:13PM -0700, Richard Henderson wrote:
>> Before gcc 4.2, __builtin___clear_cache doesn't exist, and
>> afterward the gcc s390 backend implements it as nothing.
> 
> Does it means that instruction and data caches are coherent on s390?

Yes.

Principles of Operation, 2.1 Main storage:
# Main storage may include a faster-access buffer storage, sometimes called a cache.
# Each CPU may have an associated cache. The effects, except on  performance, of
# the physical construction and the use of distinct storage media are not observable
# by the program.

This architecture pre-dates caches, I think.  ;-)


r~