From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from [140.186.70.92] (port=51324 helo=eggs.gnu.org) by lists.gnu.org with esmtp (Exim 4.43) id 1OOCVv-0005Jr-3x for qemu-devel@nongnu.org; Mon, 14 Jun 2010 12:27:56 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.69) (envelope-from ) id 1OOCVp-0002ym-Vq for qemu-devel@nongnu.org; Mon, 14 Jun 2010 12:27:51 -0400 Received: from mail-yw0-f190.google.com ([209.85.211.190]:65481) by eggs.gnu.org with esmtp (Exim 4.69) (envelope-from ) id 1OOCVp-0002vq-Pw for qemu-devel@nongnu.org; Mon, 14 Jun 2010 12:27:49 -0400 Received: by mail-yw0-f190.google.com with SMTP id 28so3282257ywh.28 for ; Mon, 14 Jun 2010 09:27:49 -0700 (PDT) Message-ID: <4C165884.1050902@codemonkey.ws> Date: Mon, 14 Jun 2010 11:27:48 -0500 From: Anthony Liguori MIME-Version: 1.0 Subject: Re: [Qemu-devel] [PATCH] hpet: Init capability register only once References: <4C15CEDD.8020104@web.de> In-Reply-To: <4C15CEDD.8020104@web.de> Content-Type: text/plain; charset=ISO-8859-15; format=flowed Content-Transfer-Encoding: 7bit List-Id: qemu-devel.nongnu.org List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , To: Jan Kiszka Cc: qemu-devel On 06/14/2010 01:40 AM, Jan Kiszka wrote: > From: Jan Kiszka > > The capability register is read-only from guest POV, so we do not need > to update it on reset. > > Signed-off-by: Jan Kiszka > Applied. Thanks. Regards, Anthony Liguori > --- > hw/hpet.c | 9 +++++---- > 1 files changed, 5 insertions(+), 4 deletions(-) > > diff --git a/hw/hpet.c b/hw/hpet.c > index 93fc399..e9b585c 100644 > --- a/hw/hpet.c > +++ b/hw/hpet.c > @@ -648,10 +648,6 @@ static void hpet_reset(DeviceState *d) > > s->hpet_counter = 0ULL; > s->hpet_offset = 0ULL; > - /* 64-bit main counter; LegacyReplacementRoute. */ > - s->capability = 0x8086a001ULL; > - s->capability |= (s->num_timers - 1)<< HPET_ID_NUM_TIM_SHIFT; > - s->capability |= ((HPET_CLK_PERIOD)<< 32); > s->config = 0ULL; > if (count> 0) { > /* we don't enable pit when hpet_reset is first called (by hpet_init) > @@ -696,6 +692,11 @@ static int hpet_init(SysBusDevice *dev) > timer->state = s; > } > > + /* 64-bit main counter; LegacyReplacementRoute. */ > + s->capability = 0x8086a001ULL; > + s->capability |= (s->num_timers - 1)<< HPET_ID_NUM_TIM_SHIFT; > + s->capability |= ((HPET_CLK_PERIOD)<< 32); > + > isa_reserve_irq(RTC_ISA_IRQ); > qdev_init_gpio_in(&dev->qdev, hpet_handle_rtc_irq, 1); > >