From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from [140.186.70.92] (port=42946 helo=eggs.gnu.org) by lists.gnu.org with esmtp (Exim 4.43) id 1OgNNC-0004v3-Ls for qemu-devel@nongnu.org; Tue, 03 Aug 2010 15:42:04 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.69) (envelope-from ) id 1OgNN9-0001WN-Dq for qemu-devel@nongnu.org; Tue, 03 Aug 2010 15:42:00 -0400 Received: from mx1.redhat.com ([209.132.183.28]:28438) by eggs.gnu.org with esmtp (Exim 4.69) (envelope-from ) id 1OgNN9-0001WF-6c for qemu-devel@nongnu.org; Tue, 03 Aug 2010 15:41:59 -0400 Message-ID: <4C5870FF.1050206@redhat.com> Date: Tue, 03 Aug 2010 22:41:51 +0300 From: Avi Kivity MIME-Version: 1.0 Subject: Re: [Qemu-devel] Anyone seeing huge slowdown launching qemu with Linux 2.6.35? References: <20100803162857.GX13789@amd.home.annexia.org> <4C584781.9040609@redhat.com> <4C5847CD.9080107@codemonkey.ws> <4C5848C7.3090806@redhat.com> <4C584982.5000108@codemonkey.ws> <4C584B66.5070404@redhat.com> <4C5854F1.3000905@codemonkey.ws> <4C5858B2.9090801@redhat.com> <4C585F5B.5070502@codemonkey.ws> <4C58635B.7020407@redhat.com> <20100803190525.GB16570@redhat.com> <4C586AB9.5040302@codemonkey.ws> <4C586CF9.7030206@redhat.com> <4C58702D.10406@codemonkey.ws> In-Reply-To: <4C58702D.10406@codemonkey.ws> Content-Type: text/plain; charset=ISO-8859-1; format=flowed Content-Transfer-Encoding: 7bit List-Id: qemu-devel.nongnu.org List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , To: Anthony Liguori Cc: kvm@vger.kernel.org, "Richard W.M. Jones" , Gleb Natapov , qemu-devel@nongnu.org On 08/03/2010 10:38 PM, Anthony Liguori wrote: >> Why do we need to transfer roms? These are devices on the memory bus >> or pci bus, it just needs to be there at the right address. > > > Not quite. The BIOS owns the option ROM space. The way it works on > bare metal is that the PCI ROM BAR gets mapped to some location in > physical memory by the BIOS, the BIOS executes the initialization > vector, and after initialization, the ROM will reorganize itself into > something smaller. It's nice and clean. > > But ISA is not nearly as clean. So far so good. > Ultimately, to make this mix work in a reasonable way, we have to > provide a side channel interface to SeaBIOS such that we can deliver > ROMs outside of PCI and still let SeaBIOS decide how ROMs get organized. I don't follow. Why do we need this side channel? What would a real ISA machine do? Are there actually enough ISA devices for there to be a problem? > > It's additionally complicated by the fact that we didn't support PCI > ROM BAR until recently so to maintain compatibility with -M older, we > have to use a side channel to lay out option roms. Again I don't follow. We can just lay out the ROMs in memory like we did in the past? -- I have a truly marvellous patch that fixes the bug which this signature is too narrow to contain.