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Date: Thu, 19 Aug 2010 20:01:18 -0500
From: Anthony Liguori <anthony@codemonkey.ws>
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Subject: Re: [Qemu-devel] [PATCH v2 0/7] APIC/IOAPIC cleanup
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To: malc <av1474@comtv.ru>
Cc: Blue Swirl <blauwirbel@gmail.com>, "Liu >> \"Liu,
	Jinsong\"" <jinsong.liu@intel.com>, Paul Brook <paul@codesourcery.com>, Avi Kivity <avi@redhat.com>, qemu-devel <qemu-devel@nongnu.org>

On 08/19/2010 05:52 PM, malc wrote:
>> Yes, but the programming model was different.
>>
>> Look at the PIC compared to the lapic.  The PIC is programmed via pio at a
>> fixed location.  There is only one PIC and it interacts with the system just
>> like all other devices.  IOW, there is no reference to CPUState.
>>      
> There are two PICs actually there's a cascade..
>    

Technically speaking, originally there was just one and then more IRQs 
were supported by cascading and reserving an IRQ line for supporting 
cascading.  I think you can technical cascade with any IRQ and have more 
than one slave but the historic PC architecture only had one slave AFAIK.

Regards,

Anthon Liguori

>> When you look at the local APIC (apic.c) however, you see that it's the only
>> device in the tree that actually interacts with a CPUState.  The notion of
>> cpu_get_current_apic() is a good example of the tricks needed to make this
>> work.
>>
>> The local APIC is a cpu feature, not a device.
>>
>> Regards,
>>
>> Anthony Liguori
>>
>>      
>