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Subject: [Qemu-devel] Re: [PATCH v2 0/7] APIC/IOAPIC cleanup
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To: Anthony Liguori <anthony@codemonkey.ws>
Cc: Blue Swirl <blauwirbel@gmail.com>, "Liu, Jinsong" <jinsong.liu@intel.com>, Paul Brook <paul@codesourcery.com>, Avi Kivity <avi@redhat.com>, qemu-devel <qemu-devel@nongnu.org>

On 08/19/2010 11:51 PM, Anthony Liguori wrote:
>>> Neither approach maps well to real hardware. An x86 CPU cannot exist
>>> without a local APIC and a local APIC cannot exist without an x86
>>> CPU. The
>>> two are fundamentally tied together.
>>
>> What about 486? Or 82489?
>
> Don't confuse the local APIC with the PIC or the I/O APIC.
>
> The local APIC has always existed in the CPU core. There is also an I/O
> APIC which exists outside of the CPU core. The local APIC was introduced
> with SMP support.

In theory it's possible to have a discrete local APIC on the 486 or the 
Pentium.  See figure 5-1 in the Intel multiprocessor specification.

> When you look at the local APIC (apic.c) however, you see that it's the
> only device in the tree that actually interacts with a CPUState.

Even worse, it does it through an opaque pointer even though the only 
CPUState that makes sense there is the i386 CPUState.  (BTW, there is 
exactly one other example of a CPUState property, and it's in the CRIS PIC).

Paolo