From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from [140.186.70.92] (port=36717 helo=eggs.gnu.org) by lists.gnu.org with esmtp (Exim 4.43) id 1OqllY-0000VL-NE for qemu-devel@nongnu.org; Wed, 01 Sep 2010 07:46:09 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.69) (envelope-from ) id 1OqllX-0007hq-8T for qemu-devel@nongnu.org; Wed, 01 Sep 2010 07:46:08 -0400 Received: from mx1.redhat.com ([209.132.183.28]:34523) by eggs.gnu.org with esmtp (Exim 4.69) (envelope-from ) id 1OqllX-0007hk-1U for qemu-devel@nongnu.org; Wed, 01 Sep 2010 07:46:07 -0400 Message-ID: <4C7E3CF5.3080400@redhat.com> Date: Wed, 01 Sep 2010 14:45:57 +0300 From: Avi Kivity MIME-Version: 1.0 References: <1283249237-31881-1-git-send-email-agraf@suse.de> <4C7E038E.9050407@redhat.com> <64ABF588-42FC-4B83-A1DD-74BEAD265909@suse.de> In-Reply-To: <64ABF588-42FC-4B83-A1DD-74BEAD265909@suse.de> Content-Type: text/plain; charset=ISO-8859-1; format=flowed Content-Transfer-Encoding: 7bit Subject: [Qemu-devel] Re: [RFC] KVM: PPC: Add level based interrupt logic List-Id: qemu-devel.nongnu.org List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , To: Alexander Graf Cc: Marcelo Tosatti , qemu-devel List On 09/01/2010 12:38 PM, Alexander Graf wrote: > On 01.09.2010, at 09:41, Avi Kivity wrote: > >> On 08/31/2010 01:07 PM, Alexander Graf wrote: >>> KVM on PowerPC used to have completely broken interrupt logic. Usually, >>> interrupts work by having a PIC that pulls a line up/down, so the CPU knows >>> that an interrupt is active. This line stays active until some action is >>> done to the PIC to release the line. >>> >>> On KVM for PPC, we just checked if there was an interrupt pending and pulled >>> a line in the kernel module. We never released it though, hoping that kernel >>> space would just declare an interrupt as released when injected - which is >>> wrong. >>> >>> To fix this, we need to completely redesign the interrupt injection logic. >>> Whenever an interrupt line gets triggered, we need to notify kernel space >>> that the line is up. Whenever it gets released, we do the same. This way >>> we can assure that the interrupt state is always known to kernel space. >>> >>> This fixes random stalls in KVM guests on PowerPC that were waiting for >>> an interrupt while everyone else thought they received it already. >> This is more or less equivalent to KVM_IRQ_LINE. > My question was if you think the internal C interface is generic enough or if it needs a lot more magic for x86 anyways :). > So you noticed I avoided it. Well, being forced to look, I don't think it's worthwhile to try to be generic here. Both the PIC<->APIC and the APIC<->core interfaces are too complicated to be modelled by a single line. -- I have a truly marvellous patch that fixes the bug which this signature is too narrow to contain.