From: Stefan Weil <weil@mail.berlios.de>
To: Blue Swirl <blauwirbel@gmail.com>
Cc: QEMU Developers <qemu-devel@nongnu.org>
Subject: [Qemu-devel] Re: [PATCH] ds1225y: Fix compiler errors in debug code
Date: Thu, 30 Sep 2010 22:22:34 +0200 [thread overview]
Message-ID: <4CA4F18A.4080005@mail.berlios.de> (raw)
In-Reply-To: <AANLkTimZ0g8LyPFbkRxXDQfGr3R2uic7nu_CKJ46kvm9@mail.gmail.com>
Am 30.09.2010 22:09, schrieb Blue Swirl:
> On Thu, Sep 30, 2010 at 7:55 PM, Stefan Weil <weil@mail.berlios.de> wrote:
>> Am 30.09.2010 21:37, schrieb Blue Swirl:
>>>
>>> On Thu, Sep 30, 2010 at 7:30 PM, Stefan Weil<weil@mail.berlios.de>
>>> wrote:
>>>
>>>>
>>>> TARGET_FMT_lx is not allowed here, so use type casts to unsigned
>>>> (which should be large enough to hold typical nvram addresses).
>>>>
>>>
>>> The correct format is TARGET_FMT_plx.
>>>
>>
>>
>> addr is typically less than 8192 (size of nvram).
>>
>> TARGET_FMT_plx displays addr using 16 hex characters
>> when the target has 64 bit addresses. That's correct but
>> does not look pretty.
>>
>> Do you prefer TARGET_FMT_plx nevertheless?
>
> We could also introduce a new format which does not perform zero padding.
Like PRIxTPA (TPA = Target Physical Address)? That would allow devices
to print their addresses according to their needs with 1, 2, 4 or more
characters.
#if TARGET_PHYS_ADDR_BITS == 32
#define PRIxTPA PRIx32
#elif TARGET_PHYS_ADDR_BITS == 64
#define PRIxTPA PRIx64
#endif
If that's ok for everybody, I could provide a patch for targphys.h
and update the patch for ds1225y.c.
prev parent reply other threads:[~2010-09-30 20:22 UTC|newest]
Thread overview: 5+ messages / expand[flat|nested] mbox.gz Atom feed top
2010-09-30 19:30 [Qemu-devel] [PATCH] ds1225y: Fix compiler errors in debug code Stefan Weil
2010-09-30 19:37 ` [Qemu-devel] " Blue Swirl
2010-09-30 19:55 ` Stefan Weil
2010-09-30 20:09 ` Blue Swirl
2010-09-30 20:22 ` Stefan Weil [this message]
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