From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from [140.186.70.92] (port=37420 helo=eggs.gnu.org) by lists.gnu.org with esmtp (Exim 4.43) id 1PNqEt-0003iS-RX for qemu-devel@nongnu.org; Wed, 01 Dec 2010 12:13:08 -0500 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1PNqEs-0000Io-S4 for qemu-devel@nongnu.org; Wed, 01 Dec 2010 12:13:07 -0500 Received: from mx1.redhat.com ([209.132.183.28]:57279) by eggs.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1PNqEs-0000Ig-H2 for qemu-devel@nongnu.org; Wed, 01 Dec 2010 12:13:06 -0500 Message-ID: <4CF68219.8030302@redhat.com> Date: Wed, 01 Dec 2010 18:12:57 +0100 From: Gerd Hoffmann MIME-Version: 1.0 References: <20101201164704.729398122@redhat.com> <20101201164743.038562673@redhat.com> In-Reply-To: <20101201164743.038562673@redhat.com> Content-Type: text/plain; charset=ISO-8859-1; format=flowed Content-Transfer-Encoding: 7bit Subject: [Qemu-devel] Re: [patch 2/3] support for UHCI suspend / remote wake up List-Id: qemu-devel.nongnu.org List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , To: Marcelo Tosatti Cc: Paul Brook , qemu-devel@nongnu.org, Juan Quintela Hi, > port->ctrl = (port->ctrl& 0x01fb) | (val& ~0x01fb); > /* some bits are reset when a '1' is written to them */ > port->ctrl&= ~(val& 0x000a); > + port->ctrl&= ~(port->ctrl& 0x0040); /* clear port resume detected */ Removing the port resume bit from the readonly mask works better than the clear-on-any-write hack ;) cheers, Gerd