From: Bernhard Beschow <shentey@gmail.com>
To: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk>, qemu-devel@nongnu.org
Cc: "Eduardo Habkost" <eduardo@habkost.net>,
qemu-block@nongnu.org, "Hervé Poussineau" <hpoussin@reactos.org>,
"Ani Sinha" <ani@anisinha.ca>,
"Richard Henderson" <richard.henderson@linaro.org>,
"Jiaxun Yang" <jiaxun.yang@flygoat.com>,
"Aurelien Jarno" <aurelien@aurel32.net>,
"Michael S. Tsirkin" <mst@redhat.com>,
"Philippe Mathieu-Daudé" <philmd@linaro.org>,
"Paolo Bonzini" <pbonzini@redhat.com>,
"Igor Mammedov" <imammedo@redhat.com>,
"Marcel Apfelbaum" <marcel.apfelbaum@gmail.com>,
"John Snow" <jsnow@redhat.com>,
"Gerd Hoffmann" <kraxel@redhat.com>,
"Philippe Mathieu-Daudé" <f4bug@amsat.org>
Subject: Re: [PATCH v5 24/31] hw/isa/piix4: Reuse struct PIIXState from PIIX3
Date: Sun, 08 Jan 2023 15:31:16 +0000 [thread overview]
Message-ID: <4D010ECA-B2B3-43C2-B0CA-1D9DC19FCAB3@gmail.com> (raw)
In-Reply-To: <29745460-a3c2-b895-80ac-26fded5f7819@ilande.co.uk>
Am 7. Januar 2023 23:48:52 UTC schrieb Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk>:
>On 05/01/2023 14:32, Bernhard Beschow wrote:
>
>> Now that PIIX4 also uses the "proxy-pic", both implementations
>
>Should "proxy-pic" be replaced with "isa-pic" (or even TYPE_ISA_PIC) here?
Yes, indeed.
Best regards,
Bernhard
>> can share the same struct.
>>
>> Signed-off-by: Bernhard Beschow <shentey@gmail.com>
>> Reviewed-by: Michael S. Tsirkin <mst@redhat.com>
>> Message-Id: <20221022150508.26830-34-shentey@gmail.com>
>> ---
>> hw/isa/piix4.c | 51 +++++++++++++++-----------------------------------
>> 1 file changed, 15 insertions(+), 36 deletions(-)
>>
>> diff --git a/hw/isa/piix4.c b/hw/isa/piix4.c
>> index eae4db0182..ce88377630 100644
>> --- a/hw/isa/piix4.c
>> +++ b/hw/isa/piix4.c
>> @@ -42,32 +42,10 @@
>> #include "sysemu/runstate.h"
>> #include "qom/object.h"
>> -struct PIIX4State {
>> - PCIDevice dev;
>> -
>> - ISAPICState pic;
>> - RTCState rtc;
>> - PCIIDEState ide;
>> - UHCIState uhci;
>> - PIIX4PMState pm;
>> -
>> - uint32_t smb_io_base;
>> -
>> - /* Reset Control Register */
>> - MemoryRegion rcr_mem;
>> - uint8_t rcr;
>> -
>> - bool has_acpi;
>> - bool has_usb;
>> - bool smm_enabled;
>> -};
>> -
>> -OBJECT_DECLARE_SIMPLE_TYPE(PIIX4State, PIIX4_PCI_DEVICE)
>> -
>> static void piix4_set_irq(void *opaque, int irq_num, int level)
>> {
>> int i, pic_irq, pic_level;
>> - PIIX4State *s = opaque;
>> + PIIXState *s = opaque;
>> PCIBus *bus = pci_get_bus(&s->dev);
>> /* now we change the pic irq level according to the piix irq mappings */
>> @@ -87,7 +65,7 @@ static void piix4_set_irq(void *opaque, int irq_num, int level)
>> static void piix4_isa_reset(DeviceState *dev)
>> {
>> - PIIX4State *d = PIIX4_PCI_DEVICE(dev);
>> + PIIXState *d = PIIX_PCI_DEVICE(dev);
>> uint8_t *pci_conf = d->dev.config;
>> pci_conf[0x04] = 0x07; // master, memory and I/O
>> @@ -122,12 +100,13 @@ static void piix4_isa_reset(DeviceState *dev)
>> pci_conf[0xac] = 0x00;
>> pci_conf[0xae] = 0x00;
>> + d->pic_levels = 0; /* not used in PIIX4 */
>> d->rcr = 0;
>> }
>> static int piix4_post_load(void *opaque, int version_id)
>> {
>> - PIIX4State *s = opaque;
>> + PIIXState *s = opaque;
>> if (version_id == 2) {
>> s->rcr = 0;
>> @@ -142,8 +121,8 @@ static const VMStateDescription vmstate_piix4 = {
>> .minimum_version_id = 2,
>> .post_load = piix4_post_load,
>> .fields = (VMStateField[]) {
>> - VMSTATE_PCI_DEVICE(dev, PIIX4State),
>> - VMSTATE_UINT8_V(rcr, PIIX4State, 3),
>> + VMSTATE_PCI_DEVICE(dev, PIIXState),
>> + VMSTATE_UINT8_V(rcr, PIIXState, 3),
>> VMSTATE_END_OF_LIST()
>> }
>> };
>> @@ -151,7 +130,7 @@ static const VMStateDescription vmstate_piix4 = {
>> static void piix4_rcr_write(void *opaque, hwaddr addr, uint64_t val,
>> unsigned int len)
>> {
>> - PIIX4State *s = opaque;
>> + PIIXState *s = opaque;
>> if (val & 4) {
>> qemu_system_reset_request(SHUTDOWN_CAUSE_GUEST_RESET);
>> @@ -163,7 +142,7 @@ static void piix4_rcr_write(void *opaque, hwaddr addr, uint64_t val,
>> static uint64_t piix4_rcr_read(void *opaque, hwaddr addr, unsigned int len)
>> {
>> - PIIX4State *s = opaque;
>> + PIIXState *s = opaque;
>> return s->rcr;
>> }
>> @@ -180,7 +159,7 @@ static const MemoryRegionOps piix4_rcr_ops = {
>> static void piix4_realize(PCIDevice *dev, Error **errp)
>> {
>> - PIIX4State *s = PIIX4_PCI_DEVICE(dev);
>> + PIIXState *s = PIIX_PCI_DEVICE(dev);
>> PCIBus *pci_bus = pci_get_bus(dev);
>> ISABus *isa_bus;
>> @@ -250,7 +229,7 @@ static void piix4_realize(PCIDevice *dev, Error **errp)
>> static void piix4_init(Object *obj)
>> {
>> - PIIX4State *s = PIIX4_PCI_DEVICE(obj);
>> + PIIXState *s = PIIX_PCI_DEVICE(obj);
>> object_initialize_child(obj, "pic", &s->pic, TYPE_ISA_PIC);
>> object_initialize_child(obj, "rtc", &s->rtc, TYPE_MC146818_RTC);
>> @@ -258,10 +237,10 @@ static void piix4_init(Object *obj)
>> }
>> static Property piix4_props[] = {
>> - DEFINE_PROP_UINT32("smb_io_base", PIIX4State, smb_io_base, 0),
>> - DEFINE_PROP_BOOL("has-acpi", PIIX4State, has_acpi, true),
>> - DEFINE_PROP_BOOL("has-usb", PIIX4State, has_usb, true),
>> - DEFINE_PROP_BOOL("smm-enabled", PIIX4State, smm_enabled, false),
>> + DEFINE_PROP_UINT32("smb_io_base", PIIXState, smb_io_base, 0),
>> + DEFINE_PROP_BOOL("has-acpi", PIIXState, has_acpi, true),
>> + DEFINE_PROP_BOOL("has-usb", PIIXState, has_usb, true),
>> + DEFINE_PROP_BOOL("smm-enabled", PIIXState, smm_enabled, false),
>> DEFINE_PROP_END_OF_LIST(),
>> };
>> @@ -289,7 +268,7 @@ static void piix4_class_init(ObjectClass *klass, void *data)
>> static const TypeInfo piix4_info = {
>> .name = TYPE_PIIX4_PCI_DEVICE,
>> .parent = TYPE_PCI_DEVICE,
>> - .instance_size = sizeof(PIIX4State),
>> + .instance_size = sizeof(PIIXState),
>> .instance_init = piix4_init,
>> .class_init = piix4_class_init,
>> .interfaces = (InterfaceInfo[]) {
>
>
>ATB,
>
>Mark.
next prev parent reply other threads:[~2023-01-08 15:35 UTC|newest]
Thread overview: 45+ messages / expand[flat|nested] mbox.gz Atom feed top
2023-01-05 14:31 [PATCH v5 00/31] Consolidate PIIX south bridges Bernhard Beschow
2023-01-05 14:31 ` [PATCH v5 01/31] hw/mips/malta: Introduce PIIX4_PCI_DEVFN definition Bernhard Beschow
2023-01-05 14:31 ` [PATCH v5 02/31] hw/mips/malta: Set PIIX4 IRQ routes in embedded bootloader Bernhard Beschow
2023-01-05 14:32 ` [PATCH v5 03/31] hw/isa/piix4: Correct IRQRC[A:D] reset values Bernhard Beschow
2023-01-05 14:32 ` [PATCH v5 04/31] hw/mips/Kconfig: Track Malta's PIIX dependencies via Kconfig Bernhard Beschow
2023-01-05 14:32 ` [PATCH v5 05/31] hw/usb/hcd-uhci: Introduce TYPE_ defines for device models Bernhard Beschow
2023-01-05 14:32 ` [PATCH v5 06/31] hw/i386/pc_piix: Associate pci_map_irq_fn as soon as PCI bus is created Bernhard Beschow
2023-01-05 14:32 ` [PATCH v5 07/31] hw/i386/pc_piix: Allow for setting properties before realizing PIIX3 south bridge Bernhard Beschow
2023-01-05 14:32 ` [PATCH v5 08/31] hw/i386/pc: Create RTC controllers in south bridges Bernhard Beschow
2023-01-05 14:32 ` [PATCH v5 09/31] hw/i386/pc: No need for rtc_state to be an out-parameter Bernhard Beschow
2023-01-05 14:32 ` [PATCH v5 10/31] hw/isa/piix3: Create USB controller in host device Bernhard Beschow
2023-01-05 14:32 ` [PATCH v5 11/31] hw/isa/piix3: Create power management " Bernhard Beschow
2023-01-05 14:32 ` [PATCH v5 12/31] hw/intc/i8259: Make using the isa_pic singleton more type-safe Bernhard Beschow
2023-01-07 23:28 ` Mark Cave-Ayland
2023-01-05 14:32 ` [PATCH v5 13/31] hw/intc/i8259: Introduce i8259 proxy "isa-pic" Bernhard Beschow
2023-01-07 23:45 ` Mark Cave-Ayland
2023-01-08 15:30 ` Bernhard Beschow
2023-01-05 14:32 ` [PATCH v5 14/31] hw/isa/piix3: Create ISA PIC in host device Bernhard Beschow
2023-01-05 14:32 ` [PATCH v5 15/31] hw/isa/piix3: Create IDE controller " Bernhard Beschow
2023-01-05 14:32 ` [PATCH v5 16/31] hw/isa/piix3: Wire up ACPI interrupt internally Bernhard Beschow
2023-01-05 14:32 ` [PATCH v5 17/31] hw/isa/piix3: Resolve redundant PIIX_NUM_PIC_IRQS Bernhard Beschow
2023-01-05 14:32 ` [PATCH v5 18/31] hw/isa/piix3: Rename pci_piix3_props for sharing with PIIX4 Bernhard Beschow
2023-01-05 14:32 ` [PATCH v5 19/31] hw/isa/piix3: Rename piix3_reset() " Bernhard Beschow
2023-01-05 14:32 ` [PATCH v5 20/31] hw/isa/piix3: Drop the "3" from PIIX base class Bernhard Beschow
2023-01-05 14:32 ` [PATCH v5 21/31] hw/isa/piix4: Make PIIX4's ACPI and USB functions optional Bernhard Beschow
2023-01-05 14:32 ` [PATCH v5 22/31] hw/isa/piix4: Remove unused inbound ISA interrupt lines Bernhard Beschow
2023-01-07 23:47 ` Mark Cave-Ayland
2023-01-05 14:32 ` [PATCH v5 23/31] hw/isa/piix4: Use ISA PIC device Bernhard Beschow
2023-01-05 14:32 ` [PATCH v5 24/31] hw/isa/piix4: Reuse struct PIIXState from PIIX3 Bernhard Beschow
2023-01-07 23:48 ` Mark Cave-Ayland
2023-01-08 15:31 ` Bernhard Beschow [this message]
2023-01-05 14:32 ` [PATCH v5 25/31] hw/isa/piix4: Rename reset control operations to match PIIX3 Bernhard Beschow
2023-01-05 14:32 ` [PATCH v5 26/31] hw/isa/piix3: Merge hw/isa/piix4.c Bernhard Beschow
2023-01-05 14:32 ` [PATCH v5 27/31] hw/isa/piix: Harmonize names of reset control memory regions Bernhard Beschow
2023-01-05 14:32 ` [PATCH v5 28/31] hw/isa/piix: Reuse PIIX3 base class' realize method in PIIX4 Bernhard Beschow
2023-01-05 14:32 ` [PATCH v5 29/31] hw/isa/piix: Rename functions to be shared for interrupt triggering Bernhard Beschow
2023-01-05 14:32 ` [PATCH v5 30/31] hw/isa/piix: Consolidate IRQ triggering Bernhard Beschow
2023-01-05 14:32 ` [PATCH v5 31/31] hw/isa/piix: Share PIIX3's base class with PIIX4 Bernhard Beschow
2023-01-05 16:39 ` [PATCH v5 00/31] Consolidate PIIX south bridges Michael S. Tsirkin
2023-01-05 17:29 ` Bernhard Beschow
2023-01-07 23:57 ` Mark Cave-Ayland
2023-01-08 15:12 ` Bernhard Beschow
2023-01-08 18:28 ` Philippe Mathieu-Daudé
2023-01-08 21:18 ` Bernhard Beschow
2023-01-09 17:33 ` Bernhard Beschow
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