From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from [140.186.70.92] (port=47362 helo=eggs.gnu.org) by lists.gnu.org with esmtp (Exim 4.43) id 1PSWeX-0003tb-Vw for qemu-devel@nongnu.org; Tue, 14 Dec 2010 10:18:59 -0500 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1PSWeW-0003OV-Oh for qemu-devel@nongnu.org; Tue, 14 Dec 2010 10:18:57 -0500 Received: from mail-gw0-f52.google.com ([74.125.83.52]:62090) by eggs.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1PSWeW-0003KN-M4 for qemu-devel@nongnu.org; Tue, 14 Dec 2010 10:18:56 -0500 Received: by mail-gw0-f52.google.com with SMTP id 11so456543gwb.11 for ; Tue, 14 Dec 2010 07:18:56 -0800 (PST) Message-ID: <4D078ADE.3020300@codemonkey.ws> Date: Tue, 14 Dec 2010 09:18:54 -0600 From: Anthony Liguori MIME-Version: 1.0 References: <20101213212059.2472.17879.stgit@s20.home> <20101213212436.2472.16686.stgit@s20.home> <4D073661.8010307@redhat.com> <1292339805.2857.157.camel@x201> In-Reply-To: <1292339805.2857.157.camel@x201> Content-Type: text/plain; charset=UTF-8; format=flowed Content-Transfer-Encoding: 7bit Subject: [Qemu-devel] Re: [PATCH v4 2/2] RAM API: Make use of it for x86 PC List-Id: qemu-devel.nongnu.org List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , To: Alex Williamson Cc: blauwirbel@gmail.com, Avi Kivity , kvm@vger.kernel.org, qemu-devel@nongnu.org On 12/14/2010 09:16 AM, Alex Williamson wrote: > On Tue, 2010-12-14 at 11:18 +0200, Avi Kivity wrote: > >> On 12/13/2010 11:24 PM, Alex Williamson wrote: >> >>> Register the actual VM RAM using the new API >>> >>> >>> @@ -913,14 +913,11 @@ void pc_memory_init(ram_addr_t ram_size, >>> /* allocate RAM */ >>> ram_addr = qemu_ram_alloc(NULL, "pc.ram", >>> below_4g_mem_size + above_4g_mem_size); >>> - cpu_register_physical_memory(0, 0xa0000, ram_addr); >>> - cpu_register_physical_memory(0x100000, >>> - below_4g_mem_size - 0x100000, >>> - ram_addr + 0x100000); >>> + ram_register(0, below_4g_mem_size, ram_addr); >>> >>> >> What's the impact of this? Won't it conflict with BIOS memory >> registration? What about VGA? >> There is no "conflict". Memory registration can punch through previous registrations. And the QEMU SMM code switches the VGA area back and forth between memory mapped and normal ram depending on the mode. This presents no functional change, just structures RAM allocation to closer reflect the way things actually work. Regards, Anthony Liguori >> In terms of patch hygiene, it should be in a separate patch titled >> "register 0xa0000-0x100000 as RAM" or something. It's a much more >> drastic change than making use of the new RAM API. >> > As we discussed in the v2 patch, the chipset can selectively switch > regions within this range to point at VGA, ROM, or RAM, but there's > always physical RAM backing the space, even when it's mapping isn't > active. VGA and ROM will be overlay the RAM mapping. I'm fine with > splitting this into two patches for debug-ability, but the change is > reflective of following the RAM API and registering all of "RAM". Maybe > it would be sufficient to make such a note explicit in this commit log? > Thanks, > > Alex > >