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* [Qemu-devel] xAPIC version register for >P4/Xeon CPUs
@ 2011-01-03 15:31 Markus Duft
  2011-01-05  7:41 ` Markus Duft
  0 siblings, 1 reply; 2+ messages in thread
From: Markus Duft @ 2011-01-03 15:31 UTC (permalink / raw)
  To: qemu-devel

Hi!

Another question: Shouldn't the APIC version be 0x14 for CPUs since P4/Xeon? At least according to the Intel docs, since then the xAPIC is used, which has 0x14 as version (see intel manuals, vol 3a "10.4.8 Local APIC Version Register". reading the APIC version register yields 0x11 for all CPUs on qemu currently (so local APIC, not local xAPIC).

is this inteded? if yes, why? (it is incompatible with the specs, right?).

Regards, Markus

^ permalink raw reply	[flat|nested] 2+ messages in thread

* Re: [Qemu-devel] xAPIC version register for >P4/Xeon CPUs
  2011-01-03 15:31 [Qemu-devel] xAPIC version register for >P4/Xeon CPUs Markus Duft
@ 2011-01-05  7:41 ` Markus Duft
  0 siblings, 0 replies; 2+ messages in thread
From: Markus Duft @ 2011-01-05  7:41 UTC (permalink / raw)
  To: qemu-devel

On 01/03/2011 04:31 PM, Markus Duft wrote:
> Hi!
> 
> Another question: Shouldn't the APIC version be 0x14 for CPUs since P4/Xeon? At least according to the Intel docs, since then the xAPIC is used, which has 0x14 as version (see intel manuals, vol 3a "10.4.8 Local APIC Version Register". reading the APIC version register yields 0x11 for all CPUs on qemu currently (so local APIC, not local xAPIC).
> 
> is this inteded? if yes, why? (it is incompatible with the specs, right?).

ping... if nobody knows, a "nobody knows..." would do, too ;)

regards, Markus

> 
> Regards, Markus
> 

^ permalink raw reply	[flat|nested] 2+ messages in thread

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2011-01-03 15:31 [Qemu-devel] xAPIC version register for >P4/Xeon CPUs Markus Duft
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