From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from [140.186.70.92] (port=42183 helo=eggs.gnu.org) by lists.gnu.org with esmtp (Exim 4.43) id 1PfFEr-0006n2-CA for qemu-devel@nongnu.org; Tue, 18 Jan 2011 12:21:17 -0500 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1PfFES-0000kX-RG for qemu-devel@nongnu.org; Tue, 18 Jan 2011 12:21:00 -0500 Received: from thoth.sbs.de ([192.35.17.2]:20236) by eggs.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1PfFES-0000k2-HZ for qemu-devel@nongnu.org; Tue, 18 Jan 2011 12:20:36 -0500 Message-ID: <4D35CBCE.3080900@siemens.com> Date: Tue, 18 Jan 2011 18:20:14 +0100 From: Jan Kiszka MIME-Version: 1.0 Subject: Re: [Qemu-devel] [PATCH 28/35] kvm: x86: Introduce kvmclock device to save/restore its state References: <4D2B6CB5.9050602@codemonkey.ws> <4D2B74D8.4080309@web.de> <4D2B8662.9060909@web.de> <4D2C60FB.7030009@linux.vnet.ibm.com> <4D2D80ED.8030405@redhat.com> <4D2D82EE.20002@siemens.com> <4D35A39A.8000801@siemens.com> <4D35ABF8.9050700@linux.vnet.ibm.com> <4D35B521.3090601@siemens.com> <4D35B6DD.1020005@linux.vnet.ibm.com> <4D35B963.7000605@siemens.com> <4D35BA22.7060602@linux.vnet.ibm.com> <4D35BD30.1060900@siemens.com> <4D35C1CE.10509@linux.vnet.ibm.com> <4D35C648.7050809@siemens.com> <4D35C92D.7030000@linux.vnet.ibm.com> In-Reply-To: <4D35C92D.7030000@linux.vnet.ibm.com> Content-Type: text/plain; charset=ISO-8859-1 Content-Transfer-Encoding: 7bit List-Id: qemu-devel.nongnu.org List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , To: Anthony Liguori Cc: "kvm@vger.kernel.org" , Glauber Costa , Marcelo Tosatti , "qemu-devel@nongnu.org" , Markus Armbruster , Avi Kivity On 2011-01-18 18:09, Anthony Liguori wrote: > On 01/18/2011 10:56 AM, Jan Kiszka wrote: >> >>> The device model topology is 100% a hidden architectural detail. >>> >> This is true for the sysbus, it is obviously not the case for PCI and >> similarly discoverable buses. There we have a guest-explorable topology >> that is currently equivalent to the the qdev layout. >> > > But we also don't do PCI passthrough so we really haven't even explored > how that maps in qdev. I don't know if qemu-kvm has attempted to > qdev-ify it. It is. And even if it weren't or the current version in qemu-kvm was not perfect, we need to consider those uses cases now as we are about to define a generic model for kvm device integration. That's the point of this discussion. > >>>> Management and analysis tools must be able to traverse the system buses >>>> and find guest devices this way. >>>> >>> We need to provide a compatible interface to the guest. If you agree >>> with my above statements, then you'll also agree that we can do this >>> without keeping the device model topology stable. >>> >>> But we also need to provide a compatible interface to management tools. >>> Exposing the device model topology as a compatible interface >>> artificially limits us. It's far better to provide higher level >>> supported interfaces to give us the flexibility to change the device >>> model as we need to. >>> >> How do you want to change qdev to keep the guest and management tool >> view stable while branching off kvm sub-buses? > > The qdev device model is not a stable interface. I think that's been > clear from the very beginning. Internals aren't stable, but they should only be changed for a good reason, specifically when the change may impact the whole set of device models. > >> Please propose such >> extensions so that they can be discussed. IIUC, that would be second >> relation between qdev and qbus instances besides the physical topology. >> What further use cases (besides passing kvm_state around) do you have in >> mind? >> > > The -device interface is a stable interface. Right now, you don't > specify any type of identifier of the pci bus when you create a PCI > device. It's implied in the interface. Which only works as along as we expose a single bus. You don't need to be an oracle to predict that this is not a stable interface. > >> >>> >>>> If they create a device on bus X, it >>>> must never end up on bus Y just because it happens to be KVM-assisted or >>>> has some other property. >>>> >>> Nope. This is exactly what should happen. >>> >>> 90% of the devices in the device model are not created by management >>> tools. They're part of a chipset. The chipset has well defined >>> extension points and we provide management interfaces to create devices >>> on those extension points. That is, interfaces to create PCI devices. >>> >>> >> Creating kvm irqchips via the management tool would be one simple way >> (not the only one, though) to enable/disable kvm assistance for those >> devices. >> > > It's automatically created as part of the CPUs or as part of the > chipset. How to enable/disable kvm assistance is a property of the CPU > and/or chipset. If we exclude creation via command line / config files, we could also pass the kvm_state directly from the machine or chipset setup code and save us at least the kvm system buses. Jan -- Siemens AG, Corporate Technology, CT T DE IT 1 Corporate Competence Center Embedded Linux