From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from [140.186.70.92] (port=37472 helo=eggs.gnu.org) by lists.gnu.org with esmtp (Exim 4.43) id 1Pov1I-0006GK-Mj for qemu-devel@nongnu.org; Mon, 14 Feb 2011 04:47:01 -0500 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1Pov1H-0000Eq-9C for qemu-devel@nongnu.org; Mon, 14 Feb 2011 04:47:00 -0500 Received: from eu1sys200aog106.obsmtp.com ([207.126.144.121]:57560) by eggs.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1Pov1H-0000ER-0Z for qemu-devel@nongnu.org; Mon, 14 Feb 2011 04:46:59 -0500 Received: from zeta.dmz-eu.st.com (ns2.st.com [164.129.230.9]) by beta.dmz-eu.st.com (STMicroelectronics) with ESMTP id 8395412B for ; Mon, 14 Feb 2011 09:46:55 +0000 (GMT) Received: from Webmail-eu.st.com (safex1hubcas6.st.com [10.75.90.73]) by zeta.dmz-eu.st.com (STMicroelectronics) with ESMTP id 4DEB918D1 for ; Mon, 14 Feb 2011 09:46:55 +0000 (GMT) Message-ID: <4D58FA0E.1040502@st.com> Date: Mon, 14 Feb 2011 10:46:54 +0100 From: Christophe Lyon MIME-Version: 1.0 Content-Type: text/plain; charset="ISO-8859-1" Content-Transfer-Encoding: 7bit Subject: [Qemu-devel] [PATCH] target-arm: fix support for vrecpe. List-Id: qemu-devel.nongnu.org List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , To: "qemu-devel@nongnu.org" Now use the same algorithm as described in the ARM ARM. Signed-off-by: Christophe Lyon --- target-arm/helper.c | 72 ++++++++++++++++++++++++++++++++++++++++++-------- 1 files changed, 60 insertions(+), 12 deletions(-) diff --git a/target-arm/helper.c b/target-arm/helper.c index 7f63a28..1ab5ae9 100644 --- a/target-arm/helper.c +++ b/target-arm/helper.c @@ -2687,13 +2687,53 @@ float32 HELPER(rsqrts_f32)(float32 a, float32 b, CPUState *env) /* NEON helpers. */ -/* TODO: The architecture specifies the value that the estimate functions - should return. We return the exact reciprocal/root instead. */ -float32 HELPER(recpe_f32)(float32 a, CPUState *env) +/* The algorithm that must be used to calculate the estimate + * is specified by the ARM ARM. + */ +static float64 recip_estimate(float64 a, CPUState *env) { float_status *s = &env->vfp.fp_status; - float32 one = int32_to_float32(1, s); - return float32_div(one, a, s); + float64 one = int64_to_float64(1, s); + /* q = (int)(a * 512.0) */ + float64 x512 = int64_to_float64(512, s); + float64 q = float64_mul(x512, a, s); + int64_t q_int = float64_to_int64_round_to_zero(q, s); + + /* r = 1.0 / (((double)q + 0.5) / 512.0) */ + q = int64_to_float64(q_int, s); + float64 half = float64_div(one, int64_to_float64(2, s), s); + q = float64_add(q, half, s); + q = float64_div(q, x512, s); + q = float64_div(one, q, s); + + /* s = (int)(256.0 * r + 0.5) */ + q = float64_mul(q, int64_to_float64(256, s), s); + q = float64_add(q, half, s); + q_int = float64_to_int64_round_to_zero(q, s); + + /* return (double)s / 256.0 */ + return float64_div(int64_to_float64(q_int, s), int64_to_float64(256, s), s); +} + +/* TODO: handle NaNs, zero and infinity as special input values. */ +float32 HELPER(recpe_f32)(float32 a, CPUState *env) +{ + float64 f64; + uint32_t val32; + + int result_exp; + + f64 = make_float64(((int64_t)0x3FE << 52) + | ((int64_t)(float32_val(a) & 0x7FFFFF) << 29)); + + result_exp = 253 - ((float32_val(a) & 0x7F800000) >> 23); + + f64 = recip_estimate(f64, env); + + val32 = (float32_val(a) & 0x80000000) + | ((result_exp & 0xFF) << 23) + | ((float64_val(f64) >> 29) & 0x7FFFFF); + return make_float32(val32); } float32 HELPER(rsqrte_f32)(float32 a, CPUState *env) @@ -2705,13 +2745,21 @@ float32 HELPER(rsqrte_f32)(float32 a, CPUState *env) uint32_t HELPER(recpe_u32)(uint32_t a, CPUState *env) { - float_status *s = &env->vfp.fp_status; - float32 tmp; - tmp = int32_to_float32(a, s); - tmp = float32_scalbn(tmp, -32, s); - tmp = helper_recpe_f32(tmp, env); - tmp = float32_scalbn(tmp, 31, s); - return float32_to_int32(tmp, s); + union { + int64_t i; + float64 f; + } dp_operand; + + if ((a & 0x80000000) == 0) { + return 0xFFFFFFFF; + } + + dp_operand.i = ((int64_t)0x3FE << 52) + | ((int64_t)(a & 0x7FFFFFFF) << 21); + + dp_operand.f = recip_estimate (dp_operand.f, env); + + return 0x80000000 | ((dp_operand.i >> 21) & 0x7FFFFFFF); } uint32_t HELPER(rsqrte_u32)(uint32_t a, CPUState *env) -- 1.7.2.3