From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from [140.186.70.92] (port=36653 helo=eggs.gnu.org) by lists.gnu.org with esmtp (Exim 4.43) id 1Pp3zs-0006VG-0M for qemu-devel@nongnu.org; Mon, 14 Feb 2011 14:22:09 -0500 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1Pp3zq-00061M-6E for qemu-devel@nongnu.org; Mon, 14 Feb 2011 14:22:07 -0500 Received: from mail-qw0-f45.google.com ([209.85.216.45]:40341) by eggs.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1Pp3zq-00060s-3K for qemu-devel@nongnu.org; Mon, 14 Feb 2011 14:22:06 -0500 Received: by qwk4 with SMTP id 4so3559978qwk.4 for ; Mon, 14 Feb 2011 11:22:04 -0800 (PST) Message-ID: <4D59809B.8080101@codemonkey.ws> Date: Mon, 14 Feb 2011 13:20:59 -0600 From: Anthony Liguori MIME-Version: 1.0 Subject: Re: [Qemu-devel] [PATCH stable] correctly check ppr priority during interrupt injection] References: <20110207141444.GH14984@redhat.com> In-Reply-To: <20110207141444.GH14984@redhat.com> Content-Type: text/plain; charset=ISO-8859-1; format=flowed Content-Transfer-Encoding: 7bit List-Id: qemu-devel.nongnu.org List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , To: Gleb Natapov Cc: qemu-devel@nongnu.org On 02/07/2011 08:14 AM, Gleb Natapov wrote: > TPR blocks all interrupts in a priority class, so simple "less or > equal" check is not enough. > > Signed-off-by: Gleb Natapov > Reviewed-by: Jan Kiszka > Applied. Thanks. Regards, Anthony Liguori > diff --git a/hw/apic.c b/hw/apic.c > index 2f8376a..218d1bb 100644 > --- a/hw/apic.c > +++ b/hw/apic.c > @@ -372,19 +372,36 @@ static int apic_get_arb_pri(APICState *s) > return 0; > } > > -/* signal the CPU if an irq is pending */ > -static void apic_update_irq(APICState *s) > + > +/* > + *<0 - low prio interrupt, > + * 0 - no interrupt, > + *>0 - interrupt number > + */ > +static int apic_irq_pending(APICState *s) > { > int irrv, ppr; > - if (!(s->spurious_vec& APIC_SV_ENABLE)) > - return; > irrv = get_highest_priority_int(s->irr); > - if (irrv< 0) > - return; > + if (irrv< 0) { > + return 0; > + } > ppr = apic_get_ppr(s); > - if (ppr&& (irrv& 0xf0)<= (ppr& 0xf0)) > + if (ppr&& (irrv& 0xf0)<= (ppr& 0xf0)) { > + return -1; > + } > + > + return irrv; > +} > + > +/* signal the CPU if an irq is pending */ > +static void apic_update_irq(APICState *s) > +{ > + if (!(s->spurious_vec& APIC_SV_ENABLE)) { > return; > - cpu_interrupt(s->cpu_env, CPU_INTERRUPT_HARD); > + } > + if (apic_irq_pending(s)> 0) { > + cpu_interrupt(s->cpu_env, CPU_INTERRUPT_HARD); > + } > } > > void apic_reset_irq_delivered(void) > @@ -590,12 +607,13 @@ int apic_get_interrupt(DeviceState *d) > if (!(s->spurious_vec& APIC_SV_ENABLE)) > return -1; > > - /* XXX: spurious IRQ handling */ > - intno = get_highest_priority_int(s->irr); > - if (intno< 0) > + intno = apic_irq_pending(s); > + > + if (intno == 0) { > return -1; > - if (s->tpr&& intno<= s->tpr) > + } else if (intno< 0) { > return s->spurious_vec& 0xff; > + } > reset_bit(s->irr, intno); > set_bit(s->isr, intno); > apic_update_irq(s); > -- > Gleb. > > >