From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from [140.186.70.92] (port=52387 helo=eggs.gnu.org) by lists.gnu.org with esmtp (Exim 4.43) id 1Q37Zm-00052H-79 for qemu-devel@nongnu.org; Fri, 25 Mar 2011 10:01:20 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1Q37Zi-0002n4-Pc for qemu-devel@nongnu.org; Fri, 25 Mar 2011 10:01:16 -0400 Received: from mail.sysgo.com ([195.145.229.155]:54927) by eggs.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1Q37Zi-0002mj-F5 for qemu-devel@nongnu.org; Fri, 25 Mar 2011 10:01:14 -0400 Message-ID: <4D8CA029.20502@sysgo.com> Date: Fri, 25 Mar 2011 15:01:13 +0100 From: Alex Zuepke MIME-Version: 1.0 Subject: Re: [Qemu-devel] ARM: BKPT instructions should raise prefetch aborts with IFSR type 00010 References: <4D8C745F.2000304@sysgo.com> In-Reply-To: Content-Type: multipart/mixed; boundary="------------050604010806020502040608" List-Id: qemu-devel.nongnu.org List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , To: Peter Maydell Cc: qemu-devel@nongnu.org This is a multi-part message in MIME format. --------------050604010806020502040608 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 7bit Hi Peter, Peter Maydell schrieb: > On 25 March 2011 10:54, Alex Zuepke wrote: >> while digging through some problems with BKPT exceptions on ARM, I >> discovered that QEMU does not update IFSR on prefetch aborts. This >> should be done since ARMv6 according to ARM docs. Please include. > > This patch is the wrong approach to fixing this bug -- the > updating of the IFSR needs to be done when the exception > is taken, not when we translate the breakpoint instruction. --- qemu-0.14.0.orig/target-arm/helper.c 2011-02-16 15:44:05.000000000 +0100 +++ qemu-0.14.0/target-arm/helper.c 2011-03-25 14:00:31.000000000 +0100 @@ -808,6 +808,8 @@ void do_interrupt(CPUARMState *env) return; } } + /* indicate debug exception in IFSR */ + env->cp15.c5_insn = 2; /* Fall through to prefetch abort. */ case EXCP_PREFETCH_ABORT: new_mode = ARM_CPU_MODE_ABT; Something like this? This neither looks good ... > I'll put this on my todo list. If you happen to have a convenient > test case demonstrating the problem, that would make a fix happen > faster ;-) Testcase is attached. $ gunzip tc.elf.gz $ qemu-system-arm.orig -nographic --cpu cortex-a8 -kernel tc.elf testcase: IFSR undefined on QEMU got prefetch abort, IFSR is 12345678 test: failed HALT Killed $ qemu-system-arm.fixed -nographic --cpu cortex-a8 -kernel tc.elf testcase: IFSR undefined on QEMU got prefetch abort, IFSR is 00000002 test: OK HALT Killed Best Regards, Alex -- Alexander Zuepke azuepke@sysgo.com SYSGO AG ~ Am Pfaffenstein 14 ~ 55270 Klein-Winternheim ~ Germany --------------050604010806020502040608 Content-Type: application/gzip; name="tc.elf.gz" Content-Transfer-Encoding: base64 Content-Disposition: inline; filename="tc.elf.gz" H4sICFqfjE0AA3RjLmVsZgDt2c1vHHcdx/HvrjdJMUFd54GkSdr8DhwcKXF/pA4NUVDG5ImK lkybBnEcJ9lQizYexVupF+gvDzw/ZEQkrp4/YSQulUjRtBE3JEZUcEMae7UNpJI1FyTggHlv bKsV6qUSUgB93tFrZ2f2952Z9Tq+7Junnz/TarVso7ZN2vpemOYhZ69ttmnaHM8mbYttXns9 2MZjcDyObPnwuFJKKaWUUkoppZRSSimllFJKKaWUUkoppZRSSimllFJKKaWUUkoppZRSSiml lFJKKaWUUkoppZRSSimllFJKKaWUUkoppZRSSimllFJKKfU/1bjZg03orGujBV56sLq6+uCf uFUtDv3jO1cOjY67fLDr6cdWzOeD7ontKxembw4uHMVx+JscG1vpzrdXLMkHcbI4nG/e/Oto f7S1LjP7J1Za3euD9l7seWfQ7r4zaO3kOcb2jfavDx7O7G+tzTS3l61xA+Mexrh+vdoKFll4 eAzd6NBf9pp90LXF4Ytst3ru9cSmldTc0uje+20Lb3x9ettonUX50kHWnWVdx/Klc2wd+yfZ tu3lwW5b3ISdJ9jfwfEvsR2d4xec45f4FX6N3+AbbnE4ej+e875/ivflfz60uB5YdGN4NLq1 fLxcHB7nHHe77y51uvfub+VYJ753P4nywdbo3v3vRKO1HOe1Fucxtl1+pm/5d5d8ePvPvMNw 0Ox9j3GLBxv3z2ez5zOWD/6+uvpBzHs1d2fY7d4Z7nY3lt+y95bu+veW2u56bd3fD4NNDPic JlZt++Afq6vjbnTPdn5wl2u0/MltbCe2bpzD3xm2uZ/u+rXT0fXifIlrDka/C3/ieh3/h/st 3gfnWOZ8e1LWjtZ9js95tHYfa49M50ud6NTy435secz+eP93oznrD/62vv63/Oz6vYX+pdmF 3jH33JnzL7nXr17uXZm72rvs5q+6F0+/cGHcvjnfd+m13pVe/9Irbvbi/LX+wbW1cwvOxkfz x5yd+6pdmZ17tXfZxr8y8/zL4+Y/f/iZ6SNfePboF2e+fPLU6TOP+v+WUkoppZRSSimllFJK KaWUUkoppZRSSimllFJKKaWUUkoppZRSSn2S2h0L7U4XDh4RYiRIEZAhR4ESFWo0sOvMw8Ej QowEKQIy5ChQokKNBnaDeTh4RIiRIEVAhhwFSlSo0cBuMg8HjwgxEqQIyJCjQIkKNRrYLebh 4BEhRoIUARlyFChRoUYD+y7zcPCIECNBioAMOQqUqFCjgX2PeTh4RIiRIEVAhhwFSlSo0cC+ zzwcPCLESJAiIEOOAiUq1GhgP2AeDh4RYiRIEZAhR4ESFWo0sB8yDwePCDESpAjIkKNAiQo1 GtiPmIeDR4QYCVIEZMhRoESFGg3sx8zDwSNCjAQpAjLkKFCiQo0G9hPm4eARIUaCFAEZchQo UaFGA/sp83DwiBAjQYqADDkKlKhQo4H9jHk4eESIkSBFQIYcBUpUqNHAbjMPB48IMRKkCMiQ o0CJCjWa24/6749SSimllFJKKaWUUkoppZRS6j+Xvv/X9//6/l/f/yullFJKKaWUUkoppf7/ anes2+504eARIUaCFAEZchQoUaFGA5tgHg4eEWIkSBGQIUeBEhVqNLBtzMPBI0KMBCkCMuQo UKJCjQa2nXk4eESIkSBFQIYcBUpUqNHAdjAPB48IMRKkCMiQo0CJCjUa2E7m4eARIUaCFAEZ chQoUaFGA/ss83DwiBAjQYqADDkKlKhQo4HtYh4OHhFiJEgRkCFHgRIVajSw3czDwSNCjAQp AjLkKFCiQo0G9gTzcPCIECNBioAMOQqUqFCjge1hHg4eEWIkSBGQIUeBEhVqNLC9zMPBI0KM BCkCMuQoUKJCjQa2j3k4eESIkSBFQIYcBUpUqNHAnmQeDh4RYiRIEZAhR4ESFWo0sKeYh4NH hBgJUgRkyFGgRIUaDWw/83DwiBAjQYqADDkKlKhQo9n/qP/+KKX+e5uZ5GG2N3txzlpP8XTT s4dmbPP4lpnHWp9qb+vsaO1s7Rrb3drTPnvy5DE3efZrFw646anpqSNuMp77Vu/c+UPPHD5g NrXwykL/Wn/2ok31e2/0bera/OXZ/qxNrT3OvPTC1Gy/f23u4uv93oJNXZp/7bXe1f4nuM9P o4XNa7uBf9Zvf/h6d307sb7usD18PfRvmL36kfO01j2xvh1DzbqaddG3P7IwWtvsX1uTbhx2 TB34t/ONenr9uV/ff469Jz/muhvX3OgKR45+zPn+BczmzSy4AQEA --------------050604010806020502040608--