From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from [140.186.70.92] (port=55038 helo=eggs.gnu.org) by lists.gnu.org with esmtp (Exim 4.43) id 1Q5STj-0005DP-ED for qemu-devel@nongnu.org; Thu, 31 Mar 2011 20:44:47 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1Q5STf-0005dz-BK for qemu-devel@nongnu.org; Thu, 31 Mar 2011 20:44:43 -0400 Received: from mail-yx0-f173.google.com ([209.85.213.173]:38237) by eggs.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1Q5STf-0005dm-7m for qemu-devel@nongnu.org; Thu, 31 Mar 2011 20:44:39 -0400 Received: by yxk8 with SMTP id 8so1421243yxk.4 for ; Thu, 31 Mar 2011 17:44:38 -0700 (PDT) Message-ID: <4D951FF3.1010306@codemonkey.ws> Date: Thu, 31 Mar 2011 19:44:35 -0500 From: Anthony Liguori MIME-Version: 1.0 Subject: Re: [Qemu-devel] [PATCH RFC] vga: flag vga ram for notifiers References: <4D94C916.6080709@codemonkey.ws> <20110331184940.GA25688@redhat.com> <4D94CFA0.3030605@codemonkey.ws> <4D94D62E.2060206@codemonkey.ws> <4D94E2A7.80700@codemonkey.ws> <20110331213849.GB27264@redhat.com> <4D94F6FA.6080505@codemonkey.ws> <20110331234240.GA28793@redhat.com> In-Reply-To: <20110331234240.GA28793@redhat.com> Content-Type: text/plain; charset=ISO-8859-1; format=flowed Content-Transfer-Encoding: 7bit List-Id: qemu-devel.nongnu.org List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , To: "Michael S. Tsirkin" Cc: Peter Maydell , Alex Williamson , qemu-devel@nongnu.org On 03/31/2011 06:42 PM, Michael S. Tsirkin wrote: > On Thu, Mar 31, 2011 at 04:49:46PM -0500, Anthony Liguori wrote: >> On 03/31/2011 04:38 PM, Michael S. Tsirkin wrote: >>>> That seems like a clearer API, yes. I think it makes it much more >>>> obvious what it's trying to achieve. >>>> >>>> -- PMM >>> Maybe register_dma_area - its' not 100% virtio specific. >> It's never been clear to me whether that's true or not. I've heard >> mixed things about whether devices DMA to other devices. I've never >> been able to find something in a specification stating >> authoritatively one way or another. >> >> Regards, >> >> Anthony Liguori >> > AFAIK the capability of cross-talk between PCI devices > exists in PCI and is optional in PCI Express. > > PCI spec says: > Full multi-master capability allowing any PCI master peer-to-peer > access to any PCI master/target. > > The Express spec says: > "The capability to route peer-to-peer transactions between hierarchy > domains through a Root Complex is optional and implementation dependent. > For example, an implementation may incorporate a real or virtual Switch > internally within the Root Complex to enable full peer-to- peer support > in a software transparent way." What's not clear to me though, is whether peer-to-peer transactions are done via a special PCI mechanism or whether it's done by doing a I/O access to the address that the device happens to be mapped to. Regards, Anthony Liguori > However I don't think guests use this with devices we emulate in any way. > > Haven't looked at ISA. >