From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from eggs.gnu.org ([2001:4830:134:3::10]:59670) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1fZ0Zv-00049O-Ld for qemu-devel@nongnu.org; Fri, 29 Jun 2018 17:05:16 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1fZ0Zr-0002BI-Kt for qemu-devel@nongnu.org; Fri, 29 Jun 2018 17:05:15 -0400 Received: from mail-io0-x22a.google.com ([2607:f8b0:4001:c06::22a]:39988) by eggs.gnu.org with esmtps (TLS1.0:RSA_AES_128_CBC_SHA1:16) (Exim 4.71) (envelope-from ) id 1fZ0Zr-0002AT-ES for qemu-devel@nongnu.org; Fri, 29 Jun 2018 17:05:11 -0400 Received: by mail-io0-x22a.google.com with SMTP id t135-v6so9644008iof.7 for ; Fri, 29 Jun 2018 14:05:11 -0700 (PDT) Mime-Version: 1.0 (Apple Message framework v753.1) Content-Type: text/plain; charset=US-ASCII; delsp=yes; format=flowed Message-Id: <4DB74515-B3DF-41FD-AB1A-1364CE376FB2@gmail.com> Content-Transfer-Encoding: 7bit From: G 3 Date: Fri, 29 Jun 2018 17:05:07 -0400 Subject: [Qemu-devel] RISC-V platform List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , To: alistair.francis@wdc.com Cc: "qemu-devel@nongnu.org Developers" Hi, I noticed your RISC-V patches on the mailing list and had a question that I think you may be able to answer. Has anyone defined a RISC-V platform yet? What I mean is defining what devices would be found on a RISC-V motherboard. I do hope to see RISC-V based desktop systems one day. But before that day can come the platform for this chip would have to be established. Could the SiFive board be the basis for such a standard?