* [Qemu-devel] [PATCH 2/2] ioapic: Implement polarity
@ 2011-05-15 11:07 Jan Kiszka
2011-06-07 15:55 ` Jan Kiszka
0 siblings, 1 reply; 3+ messages in thread
From: Jan Kiszka @ 2011-05-15 11:07 UTC (permalink / raw)
To: qemu-devel
From: Jan Kiszka <jan.kiszka@siemens.com>
If the polarity bit is set in a redirection table entry, the input level
simply has to inverted as it is low active in this case.
Signed-off-by: Jan Kiszka <jan.kiszka@siemens.com>
---
hw/ioapic.c | 3 +++
1 files changed, 3 insertions(+), 0 deletions(-)
diff --git a/hw/ioapic.c b/hw/ioapic.c
index 5916387..61991d7 100644
--- a/hw/ioapic.c
+++ b/hw/ioapic.c
@@ -148,6 +148,9 @@ static void ioapic_set_irq(void *opaque, int vector, int level)
uint32_t mask = 1 << vector;
uint64_t entry = s->ioredtbl[vector];
+ if (entry & (1 << IOAPIC_LVT_POLARITY_SHIFT)) {
+ level = !level;
+ }
if (((entry >> IOAPIC_LVT_TRIGGER_MODE_SHIFT) & 1) ==
IOAPIC_TRIGGER_LEVEL) {
/* level triggered */
^ permalink raw reply related [flat|nested] 3+ messages in thread
* Re: [Qemu-devel] [PATCH 2/2] ioapic: Implement polarity
2011-05-15 11:07 [Qemu-devel] [PATCH 2/2] ioapic: Implement polarity Jan Kiszka
@ 2011-06-07 15:55 ` Jan Kiszka
2011-06-08 8:09 ` Stefan Hajnoczi
0 siblings, 1 reply; 3+ messages in thread
From: Jan Kiszka @ 2011-06-07 15:55 UTC (permalink / raw)
To: qemu-devel; +Cc: qemu-trivial
On 2011-05-15 13:07, Jan Kiszka wrote:
> From: Jan Kiszka <jan.kiszka@siemens.com>
>
> If the polarity bit is set in a redirection table entry, the input level
> simply has to inverted as it is low active in this case.
Ping for this and
http://thread.gmane.org/gmane.comp.emulators.qemu/102459. Maybe even
trivial, so CC'ing.
Jan
>
> Signed-off-by: Jan Kiszka <jan.kiszka@siemens.com>
> ---
> hw/ioapic.c | 3 +++
> 1 files changed, 3 insertions(+), 0 deletions(-)
>
> diff --git a/hw/ioapic.c b/hw/ioapic.c
> index 5916387..61991d7 100644
> --- a/hw/ioapic.c
> +++ b/hw/ioapic.c
> @@ -148,6 +148,9 @@ static void ioapic_set_irq(void *opaque, int vector, int level)
> uint32_t mask = 1 << vector;
> uint64_t entry = s->ioredtbl[vector];
>
> + if (entry & (1 << IOAPIC_LVT_POLARITY_SHIFT)) {
> + level = !level;
> + }
> if (((entry >> IOAPIC_LVT_TRIGGER_MODE_SHIFT) & 1) ==
> IOAPIC_TRIGGER_LEVEL) {
> /* level triggered */
>
>
--
Siemens AG, Corporate Technology, CT T DE IT 1
Corporate Competence Center Embedded Linux
^ permalink raw reply [flat|nested] 3+ messages in thread
* Re: [Qemu-devel] [PATCH 2/2] ioapic: Implement polarity
2011-06-07 15:55 ` Jan Kiszka
@ 2011-06-08 8:09 ` Stefan Hajnoczi
0 siblings, 0 replies; 3+ messages in thread
From: Stefan Hajnoczi @ 2011-06-08 8:09 UTC (permalink / raw)
To: Anthony Liguori; +Cc: qemu-trivial, Jan Kiszka, qemu-devel
On Tue, Jun 07, 2011 at 05:55:10PM +0200, Jan Kiszka wrote:
> On 2011-05-15 13:07, Jan Kiszka wrote:
> > From: Jan Kiszka <jan.kiszka@siemens.com>
> >
> > If the polarity bit is set in a redirection table entry, the input level
> > simply has to inverted as it is low active in this case.
>
> Ping for this and
> http://thread.gmane.org/gmane.comp.emulators.qemu/102459. Maybe even
> trivial, so CC'ing.
Looks simple but I don't know x86 interrupt controller details, let's
see if Anthony can pick this up.
Stefan
^ permalink raw reply [flat|nested] 3+ messages in thread
end of thread, other threads:[~2011-06-08 8:09 UTC | newest]
Thread overview: 3+ messages (download: mbox.gz follow: Atom feed
-- links below jump to the message on this page --
2011-05-15 11:07 [Qemu-devel] [PATCH 2/2] ioapic: Implement polarity Jan Kiszka
2011-06-07 15:55 ` Jan Kiszka
2011-06-08 8:09 ` Stefan Hajnoczi
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox;
as well as URLs for NNTP newsgroup(s).