From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from eggs.gnu.org ([140.186.70.92]:37436) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1QN6Dd-0006lU-FJ for qemu-devel@nongnu.org; Thu, 19 May 2011 12:37:02 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1QN6Dc-0007PK-Fg for qemu-devel@nongnu.org; Thu, 19 May 2011 12:37:01 -0400 Received: from mail-yw0-f45.google.com ([209.85.213.45]:44313) by eggs.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1QN6Dc-0007PG-Bv for qemu-devel@nongnu.org; Thu, 19 May 2011 12:37:00 -0400 Received: by ywl41 with SMTP id 41so1140068ywl.4 for ; Thu, 19 May 2011 09:36:59 -0700 (PDT) Message-ID: <4DD54729.8050707@codemonkey.ws> Date: Thu, 19 May 2011 11:36:57 -0500 From: Anthony Liguori MIME-Version: 1.0 References: <4DD51FDA.3010107@codemonkey.ws> <4DD520ED.8010606@redhat.com> <4DD5260A.1080309@codemonkey.ws> <4DD5272F.5000003@siemens.com> <4DD52848.6030102@codemonkey.ws> <4DD52910.4080106@siemens.com> <4DD52B0E.2080604@codemonkey.ws> <4DD52BF2.2080506@redhat.com> <20110519161731.GA27310@redhat.com> <4DD5446A.6030003@siemens.com> <20110519162805.GC27310@redhat.com> <4DD545B2.70705@siemens.com> In-Reply-To: <4DD545B2.70705@siemens.com> Content-Type: text/plain; charset=ISO-8859-1; format=flowed Content-Transfer-Encoding: 7bit Subject: Re: [Qemu-devel] [RFC] Memory API List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , To: Jan Kiszka Cc: Avi Kivity , Gleb Natapov , qemu-devel On 05/19/2011 11:30 AM, Jan Kiszka wrote: > On 2011-05-19 18:28, Gleb Natapov wrote: >> On Thu, May 19, 2011 at 06:25:14PM +0200, Jan Kiszka wrote: >>> On 2011-05-19 18:17, Gleb Natapov wrote: >>>> On Thu, May 19, 2011 at 05:40:50PM +0300, Avi Kivity wrote: >>>>> On 05/19/2011 05:37 PM, Anthony Liguori wrote: >>>>>> >>>>>> So.... do you do: >>>>>> >>>>>> isa_register_region(ISABus *bus, MemoryRegion *mr, int priority) >>>>>> { >>>>>> chipset_register_region(bus->chipset, mr, priority + 1); >>>>>> } >>>>>> >>>>>> I don't really understand how you can fold everything into one >>>>>> table and not allow devices to override their parents using >>>>>> priorities. >>>>> >>>>> Think of how a window manager folds windows with priorities onto a >>>>> flat framebuffer. >>>>> >>>>> You do a depth-first walk of the tree. For each child list, you >>>>> iterate it from the lowest to highest priority, allowing later >>>>> subregions override earlier subregions. >>>>> >>>> And how you set those priorities in a sensible way? Why two device on a >>>> PCI bus will want to register their memory region with anything but >>>> highest priority? And if you let PCI subsystem to assign priorities how >>>> it will coordinate with ISA subsystem/memory controller what priorities >>>> to assign to get meaningful system? >>> >>> Priorities>default will only be used for explicit overlays, e.g. RAM >>> over MMIO in PAM regions. Non-default priorities won't be assigned to >>> normal PCI bars or any other device's region. >>> >> That does not explain who and how assign those priorities in globally >> meaningful way. > > There are no global priorities. Priorities are only used inside each > level of the memory region hierarchy to generate a resulting, flattened > view for the next higher level. At that level, everything imported from > below has the default prio again, ie. the lowest one. Then SMM is impossible. Why do we need priorities at all? There should be no overlap at each level in the hierarchy. If you have overlapping BARs, the PCI bus will always send the request to a single device based on something that's implementation specific. This works because each PCI device advertises the BAR locations and sizes in it's config space. To dispatch a request, the PCI bus will walk the config space to find a match. If you remove something that was previously causing an overlap, it'll the other device will now get the I/O requests. To model this correctly, you need to let the PCI bus decide how to dispatch I/O requests (again, you need hierarchical dispatch). In the absence of this, the PCI bus needs to look at all of the devices, figure out the flat mapping, and register it. When a device is added or removed, it needs to recalculate the flat mapping and register it. There is no need to have centralized logic to decide this. Regards, Anthony Liguori > > Jan >