From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from eggs.gnu.org ([140.186.70.92]:40634) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1QN8Ua-0005jL-Iy for qemu-devel@nongnu.org; Thu, 19 May 2011 15:02:41 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1QN8UZ-0000ai-Fz for qemu-devel@nongnu.org; Thu, 19 May 2011 15:02:40 -0400 Received: from mail-yw0-f45.google.com ([209.85.213.45]:38889) by eggs.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1QN8UZ-0000ae-DX for qemu-devel@nongnu.org; Thu, 19 May 2011 15:02:39 -0400 Received: by ywl41 with SMTP id 41so1205403ywl.4 for ; Thu, 19 May 2011 12:02:38 -0700 (PDT) Message-ID: <4DD5694C.10703@codemonkey.ws> Date: Thu, 19 May 2011 14:02:36 -0500 From: Anthony Liguori MIME-Version: 1.0 References: <4DD3C5B9.1080908@redhat.com> <4DD3D236.90708@siemens.com> <4DD3D95E.2060105@redhat.com> <4DD3E1B3.3020405@siemens.com> <4DD3E610.1080201@siemens.com> <4DD4199E.2000702@codemonkey.ws> <4DD41DBB.2020108@web.de> <20110519082644.GC28399@redhat.com> <4DD4D53F.1090108@web.de> <4DD52082.1080804@codemonkey.ws> <4DD521C8.5020903@siemens.com> <4DD52363.7080201@codemonkey.ws> <4DD52526.3070909@redhat.com> <4DD55EDD.9000308@codemonkey.ws> <4DD56693.2070602@web.de> In-Reply-To: <4DD56693.2070602@web.de> Content-Type: text/plain; charset=ISO-8859-1; format=flowed Content-Transfer-Encoding: 7bit Subject: Re: [Qemu-devel] [RFC] Memory API List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , To: Jan Kiszka Cc: Peter Maydell , Avi Kivity , Gleb Natapov , qemu-devel On 05/19/2011 01:50 PM, Jan Kiszka wrote: > On 2011-05-19 20:18, Anthony Liguori wrote: >> Well, not really. >> >> kvm.ko has a global mapping of RAM regions and currently only allows >> code execution from RAM. >> >> This means the only way for QEMU to enable SMM support is to program the >> global RAM regions table to enable allow RAM access for the VGA region. >> >> The problem with this is that it's perfectly conceivable to have CPU 0 >> in SMM mode while CPU 1 is doing MMIO to the VGA planar. >> >> The same problem exists with PAM. It would be much easier to implement >> PAM correctly in QEMU if it were possible to execute code via MMIO as we >> could just mark the BIOS memory as non-RAM and deal with the dispatch >> ourselves. > > If we already have to change KVM (I guess we have to), let's better add > per-CPU memory slot support. That will allow to switch between VGA and > SMRAM without costly dispatching. At this chance, I think we also need > some support for half-MMIO (MMIO on write, RAM on read) for proper flash > support. This is needed for PAM too. But RAM isn't mapped per-CPU so this is at best an optimization. You can (and do) execute instructions out of non-RAM memory though. I think if we lifted this restriction in KVM, it would allow us to handle SMRAM/PAM in a more thorough way. Regards, Anthony Liguori > > Jan >