From: Richard Henderson <rth@twiddle.net>
To: Max Filippov <jcmvbkbc@gmail.com>
Cc: qemu-devel@nongnu.org
Subject: Re: [Qemu-devel] [PATCH 09/26] target-xtensa: add special and user registers
Date: Thu, 19 May 2011 13:59:49 -0700 [thread overview]
Message-ID: <4DD584C5.8080008@twiddle.net> (raw)
In-Reply-To: <1305671572-5899-10-git-send-email-jcmvbkbc@gmail.com>
On 05/17/2011 03:32 PM, Max Filippov wrote:
> +enum {
> + THREADPTR = 231,
> + FCR = 232,
> + FSR = 233,
> +};
> +
> typedef struct XtensaConfig {
> const char *name;
> uint64_t options;
> @@ -109,6 +115,7 @@ typedef struct CPUXtensaState {
> uint32_t regs[16];
> uint32_t pc;
> uint32_t sregs[256];
> + uint32_t uregs[256];
Is it really worthwhile allocating 2k worth of space in the
CPUState when only several of the slots are actually used?
I would think that it might be better to have a function to
map between number to offset/register. E.g.
int ur_offset(int ur)
{
switch (ur) {
case THREADPTR:
return offsetof(CPUState, ur_threadptr);
case FCR:
return offsetof(CPUState, ur_fcr);
case FSR:
return offsetof(CPUState, ur_fsr);
}
return -1;
}
where the individual slots are allocated by hand in the
CPUState. The fact that they'll be named in the struct
will also make it easier to dump the value inside gdb and
see what the individual values are.
r~
next prev parent reply other threads:[~2011-05-19 20:59 UTC|newest]
Thread overview: 56+ messages / expand[flat|nested] mbox.gz Atom feed top
2011-05-17 22:32 [Qemu-devel] [PATCH 00/26] target-xtensa: introduce new target architecture Max Filippov
2011-05-17 22:32 ` [Qemu-devel] [PATCH 01/26] target-xtensa: add target stubs Max Filippov
2011-05-17 22:32 ` [Qemu-devel] [PATCH 02/26] target-xtensa: add target to the configure script Max Filippov
2011-05-17 22:32 ` [Qemu-devel] [PATCH 03/26] target-xtensa: implement disas_xtensa_insn Max Filippov
2011-05-17 22:32 ` [Qemu-devel] [PATCH 04/26] target-xtensa: implement narrow instructions Max Filippov
2011-05-17 22:32 ` [Qemu-devel] [PATCH 05/26] target-xtensa: implement RT0 group Max Filippov
2011-05-17 22:32 ` [Qemu-devel] [PATCH 06/26] target-xtensa: add sample board Max Filippov
2011-05-17 22:32 ` [Qemu-devel] [PATCH 07/26] target-xtensa: implement conditional jumps Max Filippov
2011-05-17 22:32 ` [Qemu-devel] [PATCH 08/26] target-xtensa: implement JX/RET0/CALLX Max Filippov
2011-05-17 22:32 ` [Qemu-devel] [PATCH 09/26] target-xtensa: add special and user registers Max Filippov
2011-05-19 20:59 ` Richard Henderson [this message]
2011-05-20 7:34 ` Max Filippov
2011-05-20 14:18 ` Richard Henderson
2011-05-17 22:32 ` [Qemu-devel] [PATCH 10/26] target-xtensa: implement RST3 group Max Filippov
2011-05-17 22:32 ` [Qemu-devel] [PATCH 11/26] target-xtensa: implement shifts (ST1 and RST1 groups) Max Filippov
2011-05-19 21:15 ` Richard Henderson
2011-05-17 22:32 ` [Qemu-devel] [PATCH 12/26] target-xtensa: implement LSAI group Max Filippov
2011-05-17 22:32 ` [Qemu-devel] [PATCH 13/26] target-xtensa: mark reserved and TBD opcodes Max Filippov
2011-05-17 22:32 ` [Qemu-devel] [PATCH 14/26] target-xtensa: implement SYNC group Max Filippov
2011-05-17 22:32 ` [Qemu-devel] [PATCH 15/26] target-xtensa: implement CACHE group Max Filippov
2011-05-17 22:32 ` [Qemu-devel] [PATCH 16/26] target-xtensa: implement exceptions Max Filippov
2011-05-17 22:32 ` [Qemu-devel] [PATCH 17/26] target-xtensa: implement RST2 group (32 bit mul/div/rem) Max Filippov
2011-05-17 22:32 ` [Qemu-devel] [PATCH 18/26] target-xtensa: implement windowed registers Max Filippov
2011-05-17 22:32 ` [Qemu-devel] [PATCH 19/26] target-xtensa: implement loop option Max Filippov
2011-05-19 21:51 ` Richard Henderson
2011-05-20 7:25 ` Max Filippov
2011-05-20 9:10 ` Max Filippov
2011-05-20 14:14 ` Richard Henderson
2011-05-17 22:32 ` [Qemu-devel] [PATCH 20/26] target-xtensa: implement extended L32R Max Filippov
2011-05-19 22:00 ` Richard Henderson
2011-05-20 7:14 ` Max Filippov
2011-05-20 15:30 ` Richard Henderson
2011-05-17 22:32 ` [Qemu-devel] [PATCH 21/26] target-xtensa: implement unaligned exception option Max Filippov
2011-05-19 22:04 ` Richard Henderson
2011-05-22 12:10 ` Max Filippov
2011-05-22 16:57 ` Richard Henderson
2011-05-22 20:12 ` Max Filippov
2011-05-23 13:51 ` Richard Henderson
2011-05-23 23:20 ` Max Filippov
2011-05-24 14:57 ` Richard Henderson
2011-05-17 22:32 ` [Qemu-devel] [PATCH 22/26] target-xtensa: implement SIMCALL Max Filippov
2011-05-19 22:07 ` Richard Henderson
2011-05-17 22:32 ` [Qemu-devel] [PATCH 23/26] target-xtensa: implement interrupt option Max Filippov
2011-05-20 15:44 ` Richard Henderson
2011-05-20 20:05 ` Max Filippov
2011-05-20 20:49 ` Richard Henderson
2011-05-20 21:30 ` Max Filippov
2011-05-20 22:19 ` Richard Henderson
2011-05-24 10:28 ` Max Filippov
2011-05-24 14:59 ` Richard Henderson
2011-05-24 15:11 ` Max Filippov
2011-05-17 22:32 ` [Qemu-devel] [PATCH 24/26] target-xtensa: implement accurate window check Max Filippov
2011-05-20 15:58 ` Richard Henderson
2011-05-20 19:04 ` Max Filippov
2011-05-17 22:32 ` [Qemu-devel] [PATCH 25/26] target-xtensa: implement CPENABLE and PRID SRs Max Filippov
2011-05-17 22:32 ` [Qemu-devel] [PATCH 26/26] target-xtensa: implement relocatable vectors Max Filippov
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