From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from eggs.gnu.org ([140.186.70.92]:55290) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1QNQLY-0000XG-Jl for qemu-devel@nongnu.org; Fri, 20 May 2011 10:06:33 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1QNQLX-0002j7-Lv for qemu-devel@nongnu.org; Fri, 20 May 2011 10:06:32 -0400 Received: from mail-pz0-f45.google.com ([209.85.210.45]:37682) by eggs.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1QNQLX-0002j2-9M for qemu-devel@nongnu.org; Fri, 20 May 2011 10:06:31 -0400 Received: by pzk30 with SMTP id 30so2103739pzk.4 for ; Fri, 20 May 2011 07:06:30 -0700 (PDT) Sender: Richard Henderson Message-ID: <4DD67563.9080803@twiddle.net> Date: Fri, 20 May 2011 07:06:27 -0700 From: Richard Henderson MIME-Version: 1.0 References: <1305814352-15044-1-git-send-email-avi@redhat.com> <1305814352-15044-2-git-send-email-avi@redhat.com> <4DD580FD.2030409@codemonkey.ws> <4DD6331E.8000105@redhat.com> In-Reply-To: <4DD6331E.8000105@redhat.com> Content-Type: text/plain; charset=ISO-8859-1 Content-Transfer-Encoding: 7bit Subject: Re: [Qemu-devel] [RFC v1] Add declarations for hierarchical memory region API List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , To: Avi Kivity Cc: qemu-devel@nongnu.org, kvm@vger.kernel.org On 05/20/2011 02:23 AM, Avi Kivity wrote: > On 05/19/2011 11:43 PM, Anthony Liguori wrote: >> On 05/19/2011 09:12 AM, Avi Kivity wrote: >>> The memory API separates the attributes of a memory region (its size, how >>> reads or writes are handled, dirty logging, and coalescing) from where it >>> is mapped and whether it is enabled. This allows a device to configure >>> a memory region once, then hand it off to its parent bus to map it according >>> to the bus configuration. >>> >>> Hierarchical registration also allows a device to compose a region out of >>> a number of sub-regions with different properties; for example some may be >>> RAM while others may be MMIO. >>> >>> + struct { >>> + /* If nonzero, specify bounds on access sizes beyond which a machine >>> + * check is thrown. >>> + */ >>> + unsigned min_access_size; >>> + unsigned max_access_size; >>> + /* If true, unaligned accesses are supported. Otherwise unaligned >>> + * accesses throw machine checks. >>> + */ >>> + bool unaligned; >>> + } valid; >> >> Under what circumstances would this be used? >> >> The behavior of devices that receive non-natural accesses varies wildly. >> >> For PCI devices, invalid accesses almost always return ~0. I can't think of a device where an MCE would occur. > > This was requested by Richard, so I'll let him comment. > Several alpha system chips MCE when accessed with incorrect sizes. E.g. only 64-bit accesses are allowed. Is this structure honestly any better than 4 function pointers? I can't see that it is, myself. r~