From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from eggs.gnu.org ([140.186.70.92]:33319) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1QPJ4T-000870-Bz for qemu-devel@nongnu.org; Wed, 25 May 2011 14:44:41 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1QPJ4S-0005aE-LU for qemu-devel@nongnu.org; Wed, 25 May 2011 14:44:41 -0400 Received: from mail-iy0-f173.google.com ([209.85.210.173]:46176) by eggs.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1QPJ4S-0005a6-Id for qemu-devel@nongnu.org; Wed, 25 May 2011 14:44:40 -0400 Received: by iym10 with SMTP id 10so7653804iym.4 for ; Wed, 25 May 2011 11:44:39 -0700 (PDT) Message-ID: <4DDD4E15.1080404@mcgary.org> Date: Wed, 25 May 2011 11:44:37 -0700 From: Greg McGary MIME-Version: 1.0 Content-Type: text/plain; charset=ISO-8859-1 Content-Transfer-Encoding: 7bit Subject: [Qemu-devel] Multi heterogenous CPU archs for SoC sim? List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , To: qemu-devel@nongnu.org I would like to create a QEMU model of an SoC that has several CPU cores having different architectures. I'm guessing this can be done. Has anyone has thought much about this, and/or have advice? FYI, I am reasonably experienced with QEMU--I ported it to a new proprietary generic-RISC architecture last year and have it running in linux-user mode and in system mode running a newly-ported linux kernel. G