From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from eggs.gnu.org ([140.186.70.92]:52134) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1QV2xr-0004Z5-6O for qemu-devel@nongnu.org; Fri, 10 Jun 2011 10:45:36 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1QV2xp-0003Zr-Qr for qemu-devel@nongnu.org; Fri, 10 Jun 2011 10:45:34 -0400 Received: from mail-gx0-f173.google.com ([209.85.161.173]:43601) by eggs.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1QV2xp-0003Zn-J2 for qemu-devel@nongnu.org; Fri, 10 Jun 2011 10:45:33 -0400 Received: by gxk26 with SMTP id 26so2328286gxk.4 for ; Fri, 10 Jun 2011 07:45:32 -0700 (PDT) Message-ID: <4DF22E09.6030605@codemonkey.ws> Date: Fri, 10 Jun 2011 09:45:29 -0500 From: Anthony Liguori MIME-Version: 1.0 References: <1307532813-27175-1-git-send-email-peter.maydell@linaro.org> <4DEF6B2B.7090305@siemens.com> <4DF0FCDA.5070804@siemens.com> <4DF21334.2070204@us.ibm.com> <4DF21F97.4070709@siemens.com> In-Reply-To: Content-Type: text/plain; charset=UTF-8; format=flowed Content-Transfer-Encoding: 7bit Subject: Re: [Qemu-devel] [PATCH RFC 0/3] basic support for composing sysbus devices List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , To: Markus Armbruster Cc: Peter Maydell , Anthony Liguori , =?UTF-8?B?SnVoYSBSaWloaW3DpGtp?= , "patches@linaro.org" , Jan Kiszka , "qemu-devel@nongnu.org" , Paul Brook On 06/10/2011 09:22 AM, Markus Armbruster wrote: > Peter Maydell writes: > >> But I think that's a non-typical case compared to the usual one >> of "these wires are just hardwired this way by the machine". > > IIRC, the PCI bus also provides a number of IRQ lines for the device to > tickle (INTA#..INTD#). There's rarely a need to configure their use, > though. Right. So a PCI bus has 4 Pins (ignoring MSI) that a device can connect to. This is a case where Pin is the wrong interface to model because the device decides which LNK to use. We don't want to model every single wire with a 32-bit PCI bus such that we have to make dozens of connections. We want to collapse all into a single higher level interface: So you want something like: -device i440fx,id=pcibus,slot[3]=blk0 -device virtio-pci-blk,id=blk0,bus=pcibus And then when the virtio-pci-blk device is "realized" (qdev_initfn), it should use it's bus property and connect to the appropriate LNKs. You could do the same for ISA, but since it's so common to have DIP switches on non-PnP ISA devices, and we call things ISA that aren't strictly ISA (yeah, yeah, let's not have this discussion again), actually wiring up the IRQs by hand instead of having it negotiated through the bus interface makes sense. But note that the use of "bus" here is just a name. It does not implement the notion of bus that qdev does and says nothing about device hierarchy. Regards, Anthony Liguori