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From: Alexander Graf <agraf@suse.de>
To: Scott Wood <scottwood@freescale.com>
Cc: Elie Richa <richa@adacore.com>,
	QEMU-devel Developers <qemu-devel@nongnu.org>
Subject: Re: [Qemu-devel] [PATCH 21/28] PPC: E500: Add PV spinning code
Date: Wed, 27 Jul 2011 15:34:31 +0200	[thread overview]
Message-ID: <4E3013E7.7000507@suse.de> (raw)
In-Reply-To: <20110725154050.11f07665@schlenkerla.am.freescale.net>

On 07/25/2011 10:40 PM, Scott Wood wrote:
> On Sat, 23 Jul 2011 12:50:05 +0200
> Alexander Graf<agraf@suse.de>  wrote:
>
>> +typedef struct spin_info {
>> +    uint64_t addr;
>> +    uint64_t r3;
>> +    uint32_t resv;
>> +    uint32_t pir;
>> +    uint64_t r6;
>> +} __attribute__ ((packed)) SpinInfo;
> Note that r6 isn't part of the ePAPR spin table -- I think it may have been
> in an early draft and gotten into U-Boot that way.  A future ePAPR could
> assign another use to that position in the spin table.

How is the size defined then?

> Do we support any host ABIs strange enough that __attribute__((packed))
> would be needed here?

I don't think we do, but in general I prefer to be safe rather than 
sorry. It doesn't hurt, right?

>> +static void mmubooke_create_initial_mapping(CPUState *env,
>> +                                     target_ulong va,
>> +                                     target_phys_addr_t pa,
>> +                                     target_phys_addr_t len)
>> +{
>> +    ppcmas_tlb_t *tlb = booke206_get_tlbm(env, 1, 0, 0);
>> +    target_phys_addr_t size;
>> +
>> +    size = (booke206_page_size_to_tlb(len)<<  MAS1_TSIZE_SHIFT);
>> +    tlb->mas1 = MAS1_VALID | size;
>> +    tlb->mas2 = va&  TARGET_PAGE_MASK;
>> +    tlb->mas7_3 = pa&  TARGET_PAGE_MASK;
>> +    tlb->mas7_3 |= MAS3_UR | MAS3_UW | MAS3_UX | MAS3_SR | MAS3_SW | MAS3_SX;
>> +}
> [snip]
>> +    mmubooke_create_initial_mapping(env, env->nip, env->nip, map_size);
> ePAPR says:
>
>    The Secondary IMA (SIMA) mapping in the MMU shall map effective address 0
>    to the entry_addr field in the spin table, aligned down to the SIMA size.

So it jumps to nip & ~64MB?

> Note that it's possible for the physical entry point to be>  4GiB on a
> 32-bit target.
>
> Also, MAS2[M] should be set, even if it doesn't affect anything real under
> qemu/kvm.

Ok :)

> I know that U-Boot has the same behavior on both counts.  U-Boot is wrong.

If you say so, I'll align it with ePAPR then.


Alex

  reply	other threads:[~2011-07-27 13:34 UTC|newest]

Thread overview: 34+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2011-07-23 10:49 [Qemu-devel] [PATCH 00/28] SMP support for MPC8544DS Alexander Graf
2011-07-23 10:49 ` [Qemu-devel] [PATCH 01/28] PPC: Move openpic to target specific code compilation Alexander Graf
2011-07-23 10:49 ` [Qemu-devel] [PATCH 02/28] PPC: Add CPU local MMIO regions to MPIC Alexander Graf
2011-07-23 10:49 ` [Qemu-devel] [PATCH 03/28] PPC: Extend MPIC MMIO range Alexander Graf
2011-07-23 10:49 ` [Qemu-devel] [PATCH 04/28] PPC: Fix IPI support in MPIC Alexander Graf
2011-07-23 10:49 ` [Qemu-devel] [PATCH 05/28] PPC: Set MPIC IDE for IPI to 0 Alexander Graf
2011-07-25  8:46   ` Elie Richa
2011-07-25  8:50     ` Alexander Graf
2011-07-23 10:49 ` [Qemu-devel] [PATCH 06/28] PPC: MPIC: Remove read functionality for WO registers Alexander Graf
2011-07-23 10:49 ` [Qemu-devel] [PATCH 07/28] PPC: MPIC: Fix CI bit definitions Alexander Graf
2011-07-23 10:49 ` [Qemu-devel] [PATCH 08/28] PPC: Bump MPIC up to 32 supported CPUs Alexander Graf
2011-07-23 10:49 ` [Qemu-devel] [PATCH 09/28] PPC: E500: create multiple envs Alexander Graf
2011-07-23 10:49 ` [Qemu-devel] [PATCH 10/28] PPC: E500: Generate IRQ lines for many CPUs Alexander Graf
2011-07-23 10:49 ` [Qemu-devel] [PATCH 11/28] device tree: add nop_node Alexander Graf
2011-07-23 10:49 ` [Qemu-devel] [PATCH 12/28] PPC: bamboo: Move host fdt copy to target Alexander Graf
2011-07-23 10:49 ` [Qemu-devel] [PATCH 13/28] PPC: KVM: Add generic function to read host clockfreq Alexander Graf
2011-07-23 10:49 ` [Qemu-devel] [PATCH 14/28] PPC: E500: Use generic kvm function for freq Alexander Graf
2011-07-23 10:49 ` [Qemu-devel] [PATCH 15/28] PPC: E500: Remove mpc8544_copy_soc_cell Alexander Graf
2011-07-23 10:50 ` [Qemu-devel] [PATCH 16/28] PPC: bamboo: Use kvm api for freq and clock frequencies Alexander Graf
2011-07-23 10:50 ` [Qemu-devel] [PATCH 17/28] PPC: KVM: Remove kvmppc_read_host_property Alexander Graf
2011-07-23 10:50 ` [Qemu-devel] [PATCH 18/28] PPC: KVM: Add stubs for kvm helper functions Alexander Graf
2011-07-23 10:50 ` [Qemu-devel] [PATCH 19/28] PPC: E500: Update freqs for all CPUs Alexander Graf
2011-07-23 10:50 ` [Qemu-devel] [PATCH 20/28] PPC: E500: Remove unneeded CPU nodes Alexander Graf
2011-07-23 10:50 ` [Qemu-devel] [PATCH 21/28] PPC: E500: Add PV spinning code Alexander Graf
2011-07-25 20:40   ` Scott Wood
2011-07-27 13:34     ` Alexander Graf [this message]
2011-07-27 16:18       ` Scott Wood
2011-07-23 10:50 ` [Qemu-devel] [PATCH 22/28] PPC: E500: Update cpu-release-addr property in cpu nodes Alexander Graf
2011-07-23 10:50 ` [Qemu-devel] [PATCH 23/28] device tree: add add_subnode command Alexander Graf
2011-07-23 10:50 ` [Qemu-devel] [PATCH 24/28] device tree: dont fail operations Alexander Graf
2011-07-23 10:50 ` [Qemu-devel] [PATCH 25/28] device tree: give dt more size Alexander Graf
2011-07-23 10:50 ` [Qemu-devel] [PATCH 26/28] MPC8544DS: Remove CPU nodes Alexander Graf
2011-07-23 10:50 ` [Qemu-devel] [PATCH 27/28] MPC8544DS: Generate CPU nodes on init Alexander Graf
2011-07-23 10:50 ` [Qemu-devel] [PATCH 28/28] PPC: E500: Bump CPU count to 15 Alexander Graf

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