Re: [Qemu-devel] [RFC][PATCH 0/21] QEMU Object Model

[Paolo Bonzini <pbonzini@redhat.com>]

On 07/27/2011 06:28 PM, Anthony Liguori wrote:
> On 07/27/2011 10:33 AM, Paolo Bonzini wrote:
>> On 07/27/2011 02:48 PM, Anthony Liguori wrote:
>>>
>>> So the idea here is that the PIC will multiplex a bunch of interrupts
>>> into a single line?
>>
>> Yes, but the device needs to know the interrupt number so it can expose
>> it through the enumerator interface. So the configuration cannot be
>> simply
>>
>> pic->irq[n] = tty->irq;
>>
>> Logically, it's more similar to the ISA case, but I doubt the PIC
>> distributes all interrupts to everyone in real hardware.
>>
>>> Is the enumerator something that has an interface to devices where
>>> the devices hold this info? Or is the enumerator just a bank of
>>> flash that's preprogrammed with fixed info?
>>
>> The former, at least in theory. Not sure if it also works that way in
>> real hardware, but that's the model it exposes and the way the Android
>> guys implemented it.
>
> I can't really find what you're describing. I think all the specs are on
> http://www.milkymist.org/mmsoc.html

That's milkymist, not GoldFish.

You can see the code at 
https://github.com/patricksjackson/qemu/blob/android/hw/goldfish_device.c (see 
also 
https://github.com/patricksjackson/qemu/blob/android/hw/goldfish_device.h for 
the structs composing the list).

Paolo