[Qemu-devel] [PATCH] PPC: Fix for the gdb single step problem on an rfi instruction

[Qemu-devel] [PATCH] PPC: Fix for the gdb single step problem on an rfi instruction

[Sebastian Bauer]

When using gdb to single step a ppc interrupt routine, the execution 
flow passes
the rfi instruction without actually returning from the interrupt. The 
patch
fixes this by avoiding to update the nip when the debug exception is 
raised
and a previous POWERPC_EXCP_SYNC was set. The latter is the case only, 
if code for
rfi or a related instruction was generated.

Signed-off-by: Sebastian Bauer <mail@sebastianbauer.info>
---
diff --git a/target-ppc/translate.c b/target-ppc/translate.c
index fd7c208..42b91fd 100644
--- a/target-ppc/translate.c
+++ b/target-ppc/translate.c
@@ -287,7 +287,7 @@ static inline void gen_debug_exception(DisasContext 
*ctx)
  {
      TCGv_i32 t0;

-    if (ctx->exception != POWERPC_EXCP_BRANCH)
+    if (ctx->exception != POWERPC_EXCP_BRANCH && ctx->exception != 
POWERPC_EXCP_SYNC)
          gen_update_nip(ctx, ctx->nip);
      t0 = tcg_const_i32(EXCP_DEBUG);
      gen_helper_raise_exception(t0);

Re: [Qemu-devel] [PATCH] PPC: Fix for the gdb single step problem on an rfi instruction

[Elie Richa]

Hello,

I've had this problem recently and your patch does fix the issue, thanks!

Regards,
Elie

On 08/10/2011 01:41 PM, Sebastian Bauer wrote:
> When using gdb to single step a ppc interrupt routine, the execution flow passes
> the rfi instruction without actually returning from the interrupt. The patch
> fixes this by avoiding to update the nip when the debug exception is raised
> and a previous POWERPC_EXCP_SYNC was set. The latter is the case only, if code for
> rfi or a related instruction was generated.
>
> Signed-off-by: Sebastian Bauer <mail@sebastianbauer.info>
> ---
> diff --git a/target-ppc/translate.c b/target-ppc/translate.c
> index fd7c208..42b91fd 100644
> --- a/target-ppc/translate.c
> +++ b/target-ppc/translate.c
> @@ -287,7 +287,7 @@ static inline void gen_debug_exception(DisasContext *ctx)
> {
> TCGv_i32 t0;
>
> - if (ctx->exception != POWERPC_EXCP_BRANCH)
> + if (ctx->exception != POWERPC_EXCP_BRANCH && ctx->exception != POWERPC_EXCP_SYNC)
> gen_update_nip(ctx, ctx->nip);
> t0 = tcg_const_i32(EXCP_DEBUG);
> gen_helper_raise_exception(t0);
>
>

Re: [Qemu-devel] [PATCH] PPC: Fix for the gdb single step problem on an rfi instruction

[Sebastian Bauer]

Hi!

On Fri, 12 Aug 2011 15:29:58 +0200, Elie Richa wrote:
> I've had this problem recently and your patch does fix the issue, 
> thanks!

I like to bump this as this was not in the latest ppc patch queue. Is 
there anything wrong with that patch?

TIA

Best,
Sebastian

> On 08/10/2011 01:41 PM, Sebastian Bauer wrote:
>> When using gdb to single step a ppc interrupt routine, the execution 
>> flow passes
>> the rfi instruction without actually returning from the interrupt. 
>> The patch
>> fixes this by avoiding to update the nip when the debug exception is 
>> raised
>> and a previous POWERPC_EXCP_SYNC was set. The latter is the case 
>> only, if code for
>> rfi or a related instruction was generated.
>>
>> Signed-off-by: Sebastian Bauer <mail@sebastianbauer.info>
>> ---
>> diff --git a/target-ppc/translate.c b/target-ppc/translate.c
>> index fd7c208..42b91fd 100644
>> --- a/target-ppc/translate.c
>> +++ b/target-ppc/translate.c
>> @@ -287,7 +287,7 @@ static inline void 
>> gen_debug_exception(DisasContext *ctx)
>> {
>> TCGv_i32 t0;
>>
>> - if (ctx->exception != POWERPC_EXCP_BRANCH)
>> + if (ctx->exception != POWERPC_EXCP_BRANCH && ctx->exception != 
>> POWERPC_EXCP_SYNC)
>> gen_update_nip(ctx, ctx->nip);
>> t0 = tcg_const_i32(EXCP_DEBUG);
>> gen_helper_raise_exception(t0);
>>
>>

Re: [Qemu-devel] [PATCH] PPC: Fix for the gdb single step problem on an rfi instruction

[Alexander Graf]

On 08/10/2011 01:41 PM, Sebastian Bauer wrote:
> When using gdb to single step a ppc interrupt routine, the execution 
> flow passes
> the rfi instruction without actually returning from the interrupt. The 
> patch
> fixes this by avoiding to update the nip when the debug exception is 
> raised
> and a previous POWERPC_EXCP_SYNC was set. The latter is the case only, 
> if code for
> rfi or a related instruction was generated.
>
> Signed-off-by: Sebastian Bauer <mail@sebastianbauer.info>
> ---
> diff --git a/target-ppc/translate.c b/target-ppc/translate.c
> index fd7c208..42b91fd 100644
> --- a/target-ppc/translate.c
> +++ b/target-ppc/translate.c
> @@ -287,7 +287,7 @@ static inline void 
> gen_debug_exception(DisasContext *ctx)
>  {
>      TCGv_i32 t0;
>
> -    if (ctx->exception != POWERPC_EXCP_BRANCH)
> +    if (ctx->exception != POWERPC_EXCP_BRANCH && ctx->exception != 
> POWERPC_EXCP_SYNC)
>          gen_update_nip(ctx, ctx->nip);

I fixed the patch up to align with the coding style rules:


diff --git a/target-ppc/translate.c b/target-ppc/translate.c
index 99e995c..66eae30 100644
--- a/target-ppc/translate.c
+++ b/target-ppc/translate.c
@@ -298,8 +298,10 @@ static inline void gen_debug_exception(DisasContext 
*ctx)
  {
      TCGv_i32 t0;

-    if (ctx->exception != POWERPC_EXCP_BRANCH)
+    if ((ctx->exception != POWERPC_EXCP_BRANCH) &&
+        (ctx->exception != POWERPC_EXCP_SYNC)) {
          gen_update_nip(ctx, ctx->nip);
+    }
      t0 = tcg_const_i32(EXCP_DEBUG);
      gen_helper_raise_exception(t0);
      tcg_temp_free_i32(t0);


Otherwise, applied to ppc-next now. Thanks a lot! And sorry for the late 
reply again. Please send your next patch CC'ed to qemu-ppc@nongnu.org - 
that makes it a lot easier for to not lose track of it :).


Alex