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Subject: Re: [Qemu-devel] [PATCH 2/4] Octeon cpu definitions in target-mips
 and Octeon specific changes in set_thread_area syscall
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To: khansa@kics.edu.pk
Cc: peter.maydell@linaro.org, riku.voipio@iki.fi, qemu-devel@nongnu.org, aurelien@aurel32.net

On 08/15/2011 04:25 AM, khansa@kics.edu.pk wrote:
>        ((CPUMIPSState *) cpu_env)->tls_value = arg1;
> +      if (((CPUMIPSState *) cpu_env)->insn_flags & CPU_OCTEON) {
> +          /* tls entry is moved to k0 so that this can be used later
> +             currently this thing is tested only for Octeon */
> +          ((CPUMIPSState *) cpu_env)->active_tc.gpr[26] = arg1;
> +      }

You wanted INSN_OCTEON, not CPU_OCTEON, which includes CPU_MIPS64R2.

That said, this is *not* in the current linux kernel.  And I question
the wisdom of changing the user-space ABI for TLS for a single CPU.

I think you'd better leave this out until it's actually accepted upstream.


r~