From: Richard Henderson <rth@twiddle.net>
To: Khansa Butt <khansa@kics.edu.pk>
Cc: qemu-devel@nongnu.org
Subject: Re: [Qemu-devel] [PATCH 2/4] Octeon cpu definitions in target-mips and Octeon specific changes in set_thread_area syscall
Date: Wed, 17 Aug 2011 08:03:36 -0700 [thread overview]
Message-ID: <4E4BD848.1090609@twiddle.net> (raw)
In-Reply-To: <CAAoJSP5b1qw=aSAt7bhwPER8M_g__KuGsHwgwPLy55eJstKXsA@mail.gmail.com>
On 08/17/2011 12:00 AM, Khansa Butt wrote:
> with out above fix Octeon user mode binary can not be correctly run
> on QEMU. This was the behavior on actual hardware which we noticed
> when we were debugging the user mode binary on Octeon board. (there
> are instructions in user mode ELF of Octeon which read k0 and k1
> values)
So you're running a modified compiler, libc, and kernel as well?
Because if I look in Linux 3.1-rc2, arch/mips/kernel/syscall.c,
set_thread_area and arch/mips/kernel/process.c, copy_thread,
I see no evidence that any mips variant uses k0 or k1 for TLS.
You should keep this change alongside whatever modified runtime
you are using. It does not belong upstream in QEMU until your
changes are accepted upstream in linux as well.
r~
next prev parent reply other threads:[~2011-08-17 15:03 UTC|newest]
Thread overview: 13+ messages / expand[flat|nested] mbox.gz Atom feed top
2011-08-15 11:25 [Qemu-devel] [PATCH 0/4] MIPS64 user mode emulation in QEMU with Cavium specific instruction support khansa
2011-08-15 11:25 ` [Qemu-devel] [PATCH 1/4] linux-user:Support for MIPS64 user mode emulation in QEMU khansa
2011-08-15 15:32 ` Richard Henderson
2011-08-15 11:25 ` [Qemu-devel] [PATCH 2/4] Octeon cpu definitions in target-mips and Octeon specific changes in set_thread_area syscall khansa
2011-08-15 15:43 ` Richard Henderson
2011-08-17 7:00 ` Khansa Butt
2011-08-17 15:03 ` Richard Henderson [this message]
2011-08-15 11:25 ` [Qemu-devel] [PATCH 3/4] target-mips:Support for Cavium specific instructions khansa
2011-08-15 16:18 ` Richard Henderson
2011-08-15 11:25 ` [Qemu-devel] [PATCH 4/4] Addition of Cavium instruction in disassembler khansa
2011-08-15 16:37 ` Richard Henderson
2011-08-17 6:52 ` Khansa Butt
2011-08-17 15:18 ` Richard Henderson
Reply instructions:
You may reply publicly to this message via plain-text email
using any one of the following methods:
* Save the following mbox file, import it into your mail client,
and reply-to-all from there: mbox
Avoid top-posting and favor interleaved quoting:
https://en.wikipedia.org/wiki/Posting_style#Interleaved_style
* Reply using the --to, --cc, and --in-reply-to
switches of git-send-email(1):
git send-email \
--in-reply-to=4E4BD848.1090609@twiddle.net \
--to=rth@twiddle.net \
--cc=khansa@kics.edu.pk \
--cc=qemu-devel@nongnu.org \
/path/to/YOUR_REPLY
https://kernel.org/pub/software/scm/git/docs/git-send-email.html
* If your mail client supports setting the In-Reply-To header
via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line
before the message body.
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox;
as well as URLs for NNTP newsgroup(s).