From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from eggs.gnu.org ([140.186.70.92]:52536) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1QtohX-0007LK-Q0 for qemu-devel@nongnu.org; Wed, 17 Aug 2011 18:35:09 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1QtohW-0004PR-18 for qemu-devel@nongnu.org; Wed, 17 Aug 2011 18:35:07 -0400 Received: from mail-pz0-f42.google.com ([209.85.210.42]:61344) by eggs.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1QtohV-0004Ok-LQ for qemu-devel@nongnu.org; Wed, 17 Aug 2011 18:35:05 -0400 Received: by pzk37 with SMTP id 37so2155552pzk.29 for ; Wed, 17 Aug 2011 15:35:04 -0700 (PDT) Message-ID: <4E4C4215.10704@codemonkey.ws> Date: Wed, 17 Aug 2011 17:35:01 -0500 From: Anthony Liguori MIME-Version: 1.0 References: <1313614076-28878-1-git-send-email-blanham@gmail.com> In-Reply-To: <1313614076-28878-1-git-send-email-blanham@gmail.com> Content-Type: text/plain; charset=ISO-8859-1; format=flowed Content-Transfer-Encoding: 8bit Subject: Re: [Qemu-devel] [RFC][PATCH 000/111] QEMU m68k core additions List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , To: Bryce Lanham Cc: qemu-devel@nongnu.org On 08/17/2011 03:46 PM, Bryce Lanham wrote: > These patches greatly expand Motorola 68k emulation within qemu, and are what I used as a basis for my > Google Summer of Code project to add NeXT hardware support to QEMU. Please don't crap flood the list with a series of 100 patches. Split things into logical chunks such that a series can be reasonably reviewed and applied. Regards, Anthony Liguori > > Bryce Lanham > > Alexander Paramonov (1): > linux-user: Signals processing is not thread-safe. > > Andreas Schwab (3): > m68k: add cas > m68k: define fcntl constants > m68k: add DBcc instruction. > > Laurent Vivier (106): > linux-user: add qemu-wrapper > linux-user: define default cpu model in configure instead of > linux-user/main.c > linux-user: specify the cpu model during configure > linux-user,m68k: display default cpu > linux-user: define new environment variables > linux-user: define a script to set binfmt using debian flavored tools > linux-user: define default cpu model in configure instead of > linux-user/main.c > m68k: add tcg_gen_debug_insn_start() > m68k: define m680x0 CPUs and features > m68k: add missing accessing modes for some instructions. > m68k: add Motorola 680x0 family common instructions. > m68k: add Scc instruction with memory operand. > m68k: add DBcc instruction. > m68k: modify movem instruction to manage word > m68k: add 64bit divide. > m68k: add 32bit and 64bit multiply > m68k: add word data size for suba/adda > m68k: add fpu > m68k: add "byte", "word" and memory shift > m68k: add "byte", "word" and memory rotate. > m68k: add bitfield_mem, bitfield_reg > m68k: add variable offset/width to bitfield_reg/bitfield_mem > m68k: add cas > m68k: allow fpu to manage double data type. > m68k: allow fpu to manage double data type with fmove to > m68k: add FScc instruction > m68k: add single data type to gen_ea > m68k: add linkl instruction > m68k: Add fmovecr > m68k: correct typo on f64_to_i32() return type. > m68k: improve CC_OP_LOGIC > m68k: correct neg condition code flags computation > Correct invalid use of "const void *" with "const uint8_t *" > m68k: add EA support for negx > m68k: add abcd instruction > m68k: add sbcd instruction > mm68k: add nbcd instruction > m68k: set X flag according size of operand Set X flag correctly > for addsub, arith_im, addsubq. > m68k: on 0 bit shift, don't update X flag > m68k: improve addx instructions Add (byte, word) opsize Add > memory access > m68k: improve subx,negx instructions Add (byte, word) opsize > Add memory access (subx) > m68k: improve asl/asr evaluate correclty the missing V flag > m68k: use read_imm1() when it is possible > m68k: correct shift side effect for roxrl and roxll > m68k: asl/asr, clear C flag if shift count is 0 > m68k: lsl/lsr, clear C flag if shift count is 0 > m68k: correct divs.w and divu.w > m68k: correct flags with negl > m68k: for bitfield opcodes, correct operands corruption > m68k: Correct bfclr in register case. > m68k-linux-user: add '--enable-emulop' > m68k: correctly compute divsl > m68k: correctly compute divul > m68k: add m68030 definition > m68k: remove dead code > m68k: remove useless file m68k-qreg.h > m68k: FPU rework (draft) > m68k: some FPU debugging macros > m68k: more tests > m68k: correct compute gen_bitfield_cc() > m68k: add fgetexp > m68k: add fscale > m68k: correct addsubq > m68k: add fetox and flogn > m68k: initialize FRegs, define pickNaN() > m68k: correct cmpa comparison datatype > m68k: add flog10 > m68k: add cmpm instruction > m68k: add ftwotox instruction > m68k: better fpu traces > m68k: register source operand is always in extended size > m68k: add facos instruction > m68k: add ftan instruction > m68k: add fsin instruction > m68k: add fcos instruction > m68k: correct fpcr update > m68k: add fmod instruction > m68k: flush flags before negx instruction. > m68k: correct fmovemx FP registers order. > m68k: add fatan instruction > m68k: correct bfins instruction > m68k: fcmp correctly compares infinity. > m68k: allows bfins to manage correctly width = 32 > m68k: add ftentox instruction > m68k: correctly define and manage NaN > m68k: don't call gdb_register_coprocessor() twice. > m68k: gdb FP registers are 96 bits > m68k: add exg instruction > m68k: define floatx80_default_inf_high and floatx80_default_inf_low > m68k: add bkpt instruction > m68k: correctly convert floatx80<->long double > m68k: use expl() to compute exp_FP0() > m68k: use exp2l() to compute exp2_FP0() > m68k: use logl() to compute ln_FP0() > m68k: use log10l() to compute log10_FP0() > m68k: correctly load signed word into floating point register > m68k: add fcosh instruction > m68k: add fasin instruction > m68k: add fsincos instruction > m68k: add fsinh instruction > m68k: add ftanh instruction > m68k: add flognp1 instruction > m68k: add fatanh instruction > m68k: first draft of q800 emulation (not working) > m68k: add movec instruction > m68k: move from sr can use effective addresse on m68k > > Peter Bjørn Jørgensen (1): > m68k: Added ULL to 64 bit integer in helper.c > >